Datasheet

Data Sheet ADAS3022
Rev. B | Page 29 of 40
Reference Decoupling
With any of the reference topologies described in the Voltage
Reference Input/Output section, the REF1 and REF2 reference
pins of the ADAS3022 have dynamic impedances and require
sufficient decoupling, regardless of whether the pins are used as
inputs or outputs. This decoupling usually consists of a low ESR
capacitor connected to each REF1 and REF2 and to the accom-
panying REFN return paths. Using X5R, 1206 size ceramic chip
capacitors is recommended for decoupling in all the reference
topologies described in the Voltage Reference Input/Output section.
The placement of the reference decoupling capacitors plays an
important role in the system performance. Mount the decoupling
capacitors on the same side as the ADAS3022, close to the REF1
and REF2 pins, with thick PCB traces. Route the return paths to the
REFN inputs, which are in turn connected to the analog ground
plane of the system. The resistance of the return path to ground
should be minimized by using as many through vias as possible
when it is necessary to connect to an internal PCB layer.
The REFN and RGND inputs should be connected with the
shortest distance to the analog ground plane of the system,
preferably adjacent to the solder pads, using several vias. One
common mistake is to route these traces to an individual trace
that connects to the ground of the system. This can introduce
noise, which may adversely affect LSB sensitivity. To prevent
such noise, it is highly recommended to use PCBs with multiple
layers, including ground planes, rather than using single- or
double-sided boards. Refer to UG-484 for more information
about the PCB layout of the EVAL-ADAS3022EDZ.
For applications that use multiple ADAS3022 devices or other
PulSAR ADCs, it is more effective to use the internal reference
buffer to buffer the external reference voltage, thus reducing
SAR conversion crosstalk.
The voltage reference temperature coefficient (TC) directly
affects the full-scale accuracy of the system; therefore, in
applications where full-scale accuracy is crucial, care must be
taken with the TC. For example, a ±15 ppm/°C TC of the
reference changes the full-scale accuracy by ±1 LSB/°C.
POWER SUPPLY
The ADAS3022 uses five supplies: AVDD, DVDD, VIO, VDDH,
and VSSH (see Table 9). Note that ACAP, DCAP, and RCAP are
included in Table 9 for informational purposes only because these
supplies are outputs of the on-chip supply regulators. Refer to
UG-484 for more information about how these supplies are
generated on the EVAL-ADAS3022EDZ.
Table 9. Power Supplies
Name Function Required
AVDD Analog 5 V core Yes
DVDD Digital 5 V core Yes, or can connect to
AVDD
VIO Digital input/output Yes, and can connect
to DVDD (for 5 V
level)
VDDH Positive high voltage Yes, +15 V typ
VSSH Negative high voltage Yes, −15 V typ
ACAP Analog 2.5 V core No, on chip
DCAP Digital 2.5 V core No, on chip
RCAP Analog 2.5 V core No, on chip
Core Supplies
AVDD and DVDD supply the ADAS3022 analog and digital
cores, respectively. Sufficient decoupling of these supplies is
required, consisting of at least a 10 μF capacitor and a 100 nF
capacitor on each supply. The 100 nF capacitors should be
placed as close as possible to the ADAS3022. To reduce the
number of supplies needed, DVDD can be supplied from the
analog supply by connecting a simple RC filter between AVDD
and DVDD, as shown in Figure 65.
VIO is the variable digital input/output supply and can be
directly interfaced to any logic between 1.8 V and 5 V (DVDD
supply maximum). To reduce the supplies needed, VIO can
alternatively be connected to DVDD when DVDD is supplied
from the analog supply through an RC filter. The recommended
low dropout regulators are ADP3334, ADP1715, and ADP7102/
ADP7104 for the AVDD, DVDD, and VIO supplies.
AVDD
10µF 100nF
100nF
AGND DGND
DGND
DVDD
ADAS3022
VIO
1.8V TO 5V
DIGITAL I/O
SUPPLY
ANALOG
SUPPLY
+5V
+5V DIGITAL
SUPPLY
10µF
10µF
20
Ω
VDDH
VSSH
10µF 100nF
+15
V
–
15
V
10µF 100nF
100nF
10516-020
Figure 65. ADAS3022 Supply Connections