Datasheet

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Low Power

Differential ADC Driver

Data Sheet

ADA4932-1/ADA4932-2

Rev. B Document Feedback

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FEATURES

High performance at low power

High speed

−3 dB bandwidth of 560 MHz, G = 1

0.1 dB gain flatness to 300 MHz

Slew rate: 2800 V/μs, 25% to 75%

Fast 0.1% settling time of 9 ns

Low power: 9.6 mA per amplifier

Low harmonic distortion

100 dB SFDR @ 10 MHz

90 dB SFDR @ 20 MHz

Low input voltage noise: 3.6 nV/√Hz

±0.5 mV typical input offset voltage

Externally adjustable gain

Can be used with fractional differential gains

Differential-to-differential or single-ended-to-differential

operation

Adjustable output common-mode voltage

Input common-mode range shifted down by 1 V

Wide supply range: +3 V to ±5 V

Available in 16-lead and 24-lead LFCSP packages

APPLICATIONS

ADC drivers

Single-ended-to-differential converters

IF and baseband gain blocks

Differential buffers

Line drivers

GENERAL DESCRIPTION

The ADA4932-x is the next generation AD8132 with higher

performance, and lower noise and power consumption. It is an

ideal choice for driving high performance ADCs as a single-ended-

to-differential or differential-to-differential amplifier. The output

common-mode voltage is user adjustable by means of an internal

common-mode feedback loop, allowing the ADA4932-x output

to match the input of the ADC. The internal feedback loop also

provides exceptional output balance as well as suppression of

even-order harmonic distortion products.

With the ADA4932-x, differential gain configurations are easily

realized with a simple external four-resistor feedback network that

determines the closed-loop gain of the amplifier.

The ADA4932-x is fabricated using the Analog Devices, Inc.,

proprietary silicon-germanium (SiGe) complementary bipolar

process, enabling it to achieve low levels of distortion and noise

at low power consumption. The low offset and excellent dynamic

performance of the ADA4932-x make it well suited for a wide

variety of data acquisition and signal processing applications.

FUNCTIONAL BLOCK DIAGRAMS

1–FB

2+IN

3–IN

4+FB

11 –OUT

12 PD

10 +OUT

OCM

–V

ADA4932-1

07752-001

Figure 1. ADA4932-1

07752-002

+IN2

–

FB2

+FB1

–IN1

–OUT2

PD2

–V

OCM1

+OUT1

+FB2

OCM2

+OUT2

–IN2

PD1

–OUT1

–V

–FB1

+IN1

ADA4932-2

Figure 2. ADA4932-2

–140

–130

–120

–110

–100

–90

–80

–70

–60

–50

–

100k 1M 10M 100M

HARMONIC DISTORTION (dBc)

FREQUENCY (Hz)

OUT, dm

= 2V p-p

07752-003

HD2, G = 1

HD3, G = 1

HD2, G = 2

HD3, G = 2

Figure 3. Harmonic Distortion vs. Frequency at Various Gains

The ADA4932-x is available in a Pb-free, 3 mm × 3 mm 16-lead

LFCSP (ADA4932-1, single) or a Pb-free, 4 mm × 4 mm 24-lead

LFCSP (ADA4932-2, dual). The pinout has been optimized to

facilitate PCB layout and minimize distortion. The ADA4932-1

and the ADA4932-2 are specified to operate over the −40°C to

+105°C temperature range; both operate on supplies between

+3 V and ±5 V.

Summary of content (29 pages)

PAGE 1
Low Power Differential ADC Driver ADA4932-1/ADA4932-2 Data Sheet 14 –VS 16 –VS 15 –VS ADA4932-1 –FB 1 12 PD 9 VOCM 07752-001 +VS 8 10 +OUT +FB 4 +VS 5 11 –OUT –IN 3 +VS 6 +IN 2 Figure 1.
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ADA4932-1/ADA4932-2 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Theory of Operation ...................................................................... 19 Applications ....................................................................................... 1 Applications Information .............................................................. 20 General Description ...........................................
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Data Sheet ADA4932-1/ADA4932-2 SPECIFICATIONS ±5 V OPERATION TA = 25°C, +VS = 5 V, −VS = −5 V, VOCM = 0 V, RF = 499 Ω, RG = 499 Ω, RT = 53.6 Ω (when used), RL, dm = 1 kΩ, unless otherwise noted. All specifications refer to single-ended input and differential outputs, unless otherwise noted. Refer to Figure 55 for signal definitions. ±DIN to VOUT, dm Performance Table 1. Parameter DYNAMIC PERFORMANCE −3 dB Small Signal Bandwidth −3 dB Large Signal Bandwidth Bandwidth for 0.
PAGE 5
ADA4932-1/ADA4932-2 Data Sheet VOCM to VOUT, cm Performance Table 2. Parameter VOCM DYNAMIC PERFORMANCE −3 dB Small Signal Bandwidth −3 dB Large Signal Bandwidth Slew Rate Input Voltage Noise (RTI) VOCM INPUT CHARACTERISTICS Input Voltage Range Input Resistance Input Offset Voltage VOCM CMRR Gain Conditions Min VOUT, cm = 100 mV p-p VOUT, cm = 2 V p-p VIN = 1.5 V to 3.5 V, 25% to 75% f = 1 MHz V+DIN = V−DIN = 0 V ΔVOUT, dm/ΔVOCM, ΔVOCM = ±1 V ΔVOUT, cm/ΔVOCM, ΔVOCM = ±1 V Typ Max 270 105 410 9.
PAGE 6
Data Sheet ADA4932-1/ADA4932-2 5 V OPERATION TA = 25°C, +VS = 5 V, −VS = 0 V, VOCM = 2.5 V, RF = 499 Ω, RG = 499 Ω, RT = 53.6 Ω (when used), RL, dm = 1 kΩ, unless otherwise noted. All specifications refer to single-ended input and differential outputs, unless otherwise noted. Refer to Figure 55 for signal definitions. ±DIN to VOUT, dm Performance Table 4. Parameter DYNAMIC PERFORMANCE −3 dB Small Signal Bandwidth −3 dB Large Signal Bandwidth Bandwidth for 0.1 dB Flatness Slew Rate Settling Time to 0.
PAGE 7
ADA4932-1/ADA4932-2 Data Sheet VOCM to VOUT, cm Performance Table 5. Parameter VOCM DYNAMIC PERFORMANCE −3 dB Small Signal Bandwidth −3 dB Large Signal Bandwidth Slew Rate Input Voltage Noise (RTI) VOCM INPUT CHARACTERISTICS Input Voltage Range Input Resistance Input Offset Voltage VOCM CMRR Gain Conditions Min VOUT, cm = 100 mV p-p VOUT, cm = 2 V p-p VIN = 1.5 V to 3.5 V, 25% to 75% f = 1 MHz V+DIN = V−DIN = 2.5 V ΔVOUT, dm/ΔVOCM, ΔVOCM = ±1 V ΔVOUT, cm/ΔVOCM, ΔVOCM = ±1 V Typ Max 260 90 360 9.
PAGE 8
Data Sheet ADA4932-1/ADA4932-2 ABSOLUTE MAXIMUM RATINGS Table 7. Parameter Supply Voltage Power Dissipation Input Current, +IN, −IN, PD Storage Temperature Range Operating Temperature Range ADA4932-1 ADA4932-2 Lead Temperature (Soldering, 10 sec) Junction Temperature Rating 11 V See Figure 4 ±5 mA −65°C to +125°C −40°C to +105°C −40°C to +105°C 300°C 150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device.
PAGE 9
ADA4932-1/ADA4932-2 Data Sheet PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS +VS1 3 ADA4932-2 TOP VIEW (Not to Scale) 10 +OUT +VS1 4 TOP VIEW (Not to Scale) 16 –VS2 15 –VS2 –FB2 5 14 PD2 +OUT2 12 +VS2 9 VOCM2 11 NOTES 1. SOLDER EXPOSED PADDLE ON BACK OF PACKAGE TO GROUND PLANE OR TO A POWER PLANE. +VS2 10 –IN2 7 13 –OUT2 +FB2 8 07752-005 +IN2 6 NOTES 1. SOLDER EXPOSED PADDLE ON BACK OF PACKAGE TO GROUND PLANE OR TO A POWER PLANE. Figure 5.
PAGE 10
Data Sheet ADA4932-1/ADA4932-2 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, +VS = 5 V, −VS = −5 V, VOCM = 0 V, RG = 499 Ω, RF = 499 Ω, RT = 53.6 Ω (when used), RL, dm = 1 kΩ, unless otherwise noted. Refer to Figure 52 for test setup. Refer to Figure 55 for signal definitions. 2 NORMALIZED CLOSED-LOOP GAIN (dB) 1 GAIN = 1 GAIN = 2 0 –1 –2 –3 –4 –5 –6 –7 –8 1M 10M 100M FREQUENCY (Hz) 0 –2 –3 –4 –5 –6 –7 –8 100M 10M FREQUENCY (Hz) 1M 1G Figure 10.
PAGE 11
ADA4932-1/ADA4932-2 Data Sheet 2 2 VOUT, dm = 2V p-p 1 1 0 0 CLOSED-LOOP GAIN (dB) –1 TA = –40°C TA = +25°C TA = +105°C –2 –3 –4 –5 –6 TA = –40°C TA = +25°C TA = +105°C –2 –3 –4 –5 –8 1M 10M 100M FREQUENCY (Hz) 07752-016 07752-013 –6 –7 –7 –8 1M 1G Figure 13.
PAGE 12
Data Sheet ADA4932-1/ADA4932-2 4 4 VOUT, dm = 100mV p-p VOUT, dm = 2V p-p 2 CLOSED-LOOP GAIN (dB) CL = 0pF CL = 0.9pF CL = 1.8pF –2 –4 –6 1M 10M 100M FREQUENCY (Hz) 1G CL = 0pF CL = 0.9pF CL = 1.8pF –2 –4 –6 –8 07752-019 –8 0 –10 10M 10G Figure 19. Small Signal Frequency Response at Various Capacitive Loads 1G 0.5 VOUT, dm = 100mV p-p VOUT, dm = 2V p-p 0.4 0.3 0.3 0.2 0.1 0 –0.1 ADA4932-1, ADA4932-1, ADA4932-2, ADA4932-2, ADA4932-2, ADA4932-2, –0.2 –0.3 –0.
PAGE 13
ADA4932-1/ADA4932-2 –60 –70 –80 –90 –100 –110 07752-025 –120 –130 –140 100k 1M 10M FREQUENCY (Hz) ±5.0V ±5.0V ±2.5V ±2.5V –90 –100 –110 –120 –130 –140 100k –30 1M 10M FREQUENCY (Hz) –110 –120 HD2, HD3, HD2, HD3, –70 –90 –100 –110 –120 –70 –80 –90 –100 –110 –4 –3 –2 –1 0 1 VOCM (V p-p) 2 3 2 3 4 5 6 VOUT, dm (V p-p) 7 8 9 10 VOUT = 2V p-p –40 HD2 AT 10MHz HD3 AT 10MHz HD2 AT 30MHz HD3 AT 30MHz –50 –60 –70 –80 –90 –100 07752-030 10MHz 10MHz 30MHz 30MHz –130 1 Figure 29.
PAGE 14
Data Sheet ADA4932-1/ADA4932-2 –40 –70 –80 –90 –100 –110 –120 –130 –140 100k 1M 10M FREQUENCY (Hz) –110 –120 0 RL = 200Ω –90 –100 RL = 1kΩ –120 –130 1M 10M FREQUENCY (Hz) 100M –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 29.6 100M 29.7 29.8 29.9 30.0 30.1 30.2 30.3 30.4 30.5 FREQUENCY (MHz) Figure 35.
PAGE 15
ADA4932-1/ADA4932-2 Data Sheet –10 80 90 60 45 RL, dm = 200Ω –20 0 GAIN GAIN (dB) 20 –40 –45 –90 0 PHASE –20 –135 –40 –180 –60 –225 –50 PHASE (Degrees) OUTPUT BALANCE (dB) 40 –30 10M 100M 1G FREQUENCY (Hz) –80 1k 10k 1G –270 10G 100 OUTPUT IMPEDANCE (Ω) S-PARAMETERS (dB) 100M Figure 40. Open-Loop Gain and Phase vs.
PAGE 16
Data Sheet ADA4932-1/ADA4932-2 1.5 0.06 1.0 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 0.04 0.02 0 –0.02 0.5 0 –0.5 –1.0 07752-146 –0.04 –1.5 0 5 10 15 20 25 30 TIME (ns) 0 07752-059 –0.06 Figure 43. Small Signal Pulse Response 5 10 15 TIME (ns) 20 25 30 Figure 46. Large Signal Pulse Response 0.08 1.5 0.06 1.0 OUTPUT VOLTAGE (V) 0.02 0 –0.02 CL = 0pF CL = 0.9pF CL = 1.8pF 10 15 20 25 30 TIME (ns) Figure 44.
PAGE 17
ADA4932-1/ADA4932-2 Data Sheet 1.6 0.4 1.2 0.3 1.2 PD 0.1 OUTPUT 0 0 ERROR –0.4 –0.1 –0.8 –0.2 –1.2 –0.3 –1.6 –0.4 ERROR (%) 0.2 0.4 5 0.8 4 0.6 3 0.4 2 1 0.2 VON 0 –2.0 –0.5 0 2 4 6 12 8 10 TIME (ns) 14 16 18 20 07752-149 0 VOUT, dm = 2V p-p RL, dm = 200Ω CHANNEL 1 TO CHANNEL 2 CHANNEL 2 TO CHANNEL 1 –40 –60 –80 –100 –120 07752-150 –140 –160 1M 10M 100M FREQUENCY (Hz) 0 1 2 3 4 Figure 51. PD Response Time 0 –20 –1 –0.2 TIME (µs) Figure 49.
PAGE 18
Data Sheet ADA4932-1/ADA4932-2 TEST CIRCUITS 499Ω DC-COUPLED GENERATOR +5V 50Ω 499Ω 53.6Ω VIN VOCM 1kΩ ADA4932-x 499Ω 07752-043 25.5Ω –5V 499Ω Figure 52. Equivalent Basic Test Circuit, G = 1 NETWORK ANALYZER INPUT NETWORK ANALYZER OUTPUT AC-COUPLED 50Ω +5V 50Ω 499Ω VOCM 53.6Ω VIN 49.9Ω 499Ω ADA4932-x 499Ω NETWORK ANALYZER INPUT –5V 499Ω 0.1µF 49.9Ω 50Ω 07752-044 25.5Ω Figure 53. Test Circuit for Output Balance, CMRR 499Ω DC-COUPLED GENERATOR VIN 0.
PAGE 19
ADA4932-1/ADA4932-2 Data Sheet TERMINOLOGY Common-Mode Voltage Common-mode voltage refers to the average of two node voltages with respect to the local ground reference. The output commonmode voltage is defined as –FB RG +IN VOCM –OUT ADA4932-x –DIN RG R F –IN RL, dm VOUT, dm +OUT +FB VOUT, cm = (V+OUT + V−OUT)/2 07752-046 +DIN RF Figure 55. Signal and Circuit Definitions Differential Voltage Differential voltage refers to the difference between two node voltages.
PAGE 20
Data Sheet ADA4932-1/ADA4932-2 THEORY OF OPERATION The ADA4932-x differs from conventional op amps in that it has two outputs whose voltages move in opposite directions and an additional input, VOCM. Like an op amp, it relies on high openloop gain and negative feedback to force these outputs to the desired voltages.
PAGE 21
ADA4932-1/ADA4932-2 Data Sheet APPLICATIONS INFORMATION ANALYZING AN APPLICATION CIRCUIT The ADA4932-x uses high open-loop gain and negative feedback to force its differential and common-mode output voltages in such a way as to minimize the differential and common-mode error voltages. The differential error voltage is defined as the voltage between the differential inputs labeled +IN and −IN (see Figure 55). For most purposes, this voltage can be assumed to be zero.
PAGE 22
Data Sheet ADA4932-1/ADA4932-2 Similar to the case of a conventional op amp, the output noise voltage densities can be estimated by multiplying the inputreferred terms at +IN and −IN by the appropriate output factor, where: is the circuit noise gain. RG1 RG2 and β2 = are the feedback factors. RF1 + RG1 RF2 + RG2 When the feedback factors are matched, RF1/RG1 = RF2/RG2, β1 = β2 = β, and the noise gain becomes GN = R 1 =1+ F β RG Note that the output noise from VOCM goes to zero in this case.
PAGE 23
ADA4932-1/ADA4932-2 Data Sheet Figure 60 shows that the effective RG in the upper feedback loop is now greater than the RG in the lower loop due to the addition of the termination resistors. To compensate for the imbalance of the gain resistors, add a correction resistor (RTS) in series with RG in the lower loop. RTS is the Thevenin equivalent of the source resistance, RS, and the termination resistance, RT, and is equal to RS||RT. 3.
PAGE 24
Data Sheet 4. ADA4932-1/ADA4932-2 INPUT AND OUTPUT CAPACITIVE AC COUPLING The feedback resistor value is modified as a final gain adjustment to obtain the desired output voltage. To make the output voltage VOUT = 1 V p-p, calculate RF using the following formula: RF = (Desired V OUT , dm )(R G + RTS ) VTH = (1 V p − p)(524.5 Ω) = 509 Ω 1.03 V p − p The closest standard 1% value to 509 Ω is 511 Ω, which gives a differential output voltage of 1.00 V p-p.
PAGE 25
ADA4932-1/ADA4932-2 Data Sheet LAYOUT, GROUNDING, AND BYPASSING As a high speed device, the ADA4932-x is sensitive to the PCB environment in which it operates. Realizing its superior performance requires attention to the details of high speed PCB design. Bypass the power supply pins as close to the device as possible and directly to a nearby ground plane. High frequency ceramic chip capacitors should be used. It is recommended that two parallel bypass capacitors (1000 pF and 0.
PAGE 26
Data Sheet ADA4932-1/ADA4932-2 HIGH PERFORMANCE ADC DRIVING In this example, the signal generator has a 1 V p-p symmetric, ground-referenced bipolar output when terminated in 50 Ω. The VOCM input is bypassed for noise reduction, and set externally with 1% resistors to maximize output dynamic range on the tight 3.3 V supply. The ADA4932-x is ideally suited for broadband dc-coupled applications.
PAGE 27
ADA4932-1/ADA4932-2 Data Sheet OUTLINE DIMENSIONS 3.00 BSC SQ 0.60 MAX 13 16 12 (BOTTOM VIEW) 1 0.45 TOP VIEW 2.75 BSC SQ 0.80 MAX 0.65 TYP 12° MAX 9 0.30 0.23 0.18 4 5 8 0.25 MIN 1.50 REF FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. 0.05 MAX 0.02 NOM SEATING PLANE *1.45 1.30 SQ 1.15 EXPOSED PAD 0.50 BSC 1.00 0.85 0.80 PIN 1 INDICATOR 0.20 REF 072208-A PIN 1 INDICATOR 0.50 0.40 0.
PAGE 28
Data Sheet ADA4932-1/ADA4932-2 NOTES Rev.
PAGE 29
ADA4932-1/ADA4932-2 Data Sheet NOTES ©2008–2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07752-0-3/13(B) Rev.