Datasheet

Data Sheet ADA4898-1/ADA4898-2
Rev. D | Page 5 of 20
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Supply Voltage 36 V
Power Dissipation
See Figure 4
Differential Mode Input Voltage ±1.5 V
Common-Mode Input Voltage ±11.4 V
Storage Temperature Range −65°C to +150°C
Operating Temperature Range −40°C to +105°C
Lead Temperature (Soldering, 10 sec) 300°C
Junction Temperature 150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θ
JA
is specified for the worst-case conditions; that is, θ
JA
is
specified for a device soldered in the circuit board with its
exposed paddle soldered to a pad on the PCB surface that is
thermally connected to a copper plane, with zero airflow.
Table 4.
Package Type θ
JA
θ
JC
Unit
Single 8-Lead SOIC_N_EP on a 4-Layer Board
47 29
°C/W
Dual 8-Lead SOIC_N_EP on a 4-Layer Board
42 29
°C/W
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the ADA4898 package is
limited by the associated rise in junction temperature (T
J
) on
the die. At approximately 150°C, which is the glass transition
temperature, the plastic changes its properties. Even temporarily
exceeding this temperature limit can change the stresses that the
package exerts on the die, permanently shifting the parametric
performance of the ADA4898. Exceeding a junction temperature
of 150°C for an extended period can result in changes in the
silicon devices, potentially causing failure.
The power dissipated in the package (P
D
) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the output load drive. The quiescent power is
the voltage between the supply pins (V
S
) times the quiescent
current (I
S
). The power dissipated due to the load drive depends
upon the particular application. For each output, the power due
to load drive is calculated by multiplying the load current by the
associated voltage drop across the device. RMS voltages and
currents must be used in these calculations.
Airflow increases heat dissipation, effectively reducing θ
JA
. In
addition, more metal directly in contact with the package leads
from metal traces, through holes, ground, and power planes
reduces the θ
JA
. The exposed paddle on the underside of the
package must be soldered to a pad on the PCB surface that is
thermally connected to a copper plane to achieve the specified θ
JA
.
Figure 4 shows the maximum power dissipation vs. the ambient
temperature for the single and dual 8-lead SOIC_N_EP on a
JEDEC standard 4-layer board, with its underside paddle
soldered to a pad that is thermally connected to a PCB plane. θ
JA
values are approximations.
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
5.0
4.5
07037-003
AMBIENT TEMPERATURE (°C)
MAXIMUM POWER DISSIPATION (W)
0 20 40 60 80 10010 30 50 70 90–40 –20–30 –10
ADA4898-2
ADA4898-1
Figure 4. Maximum Power Dissipation vs. Ambient Temperature
ESD CAUTION