Datasheet

Data Sheet ADA4895-1/ADA4895-2
Rev. A | Page 7 of 24
ABSOLUTE MAXIMUM RATINGS
Table 5.
Parameter Rating
Supply Voltage 11 V
Power Dissipation See Figure 4
Common-Mode Input Voltage −V
S
− 0.7 V to +V
S
+ 0.7 V
Differential Input Voltage
±0.7 V
Storage Temperature Range −65°C to +125°C
Operating Temperature Range −40°C to +125°C
Lead Temperature (Soldering 10 sec)
300°C
Junction Temperature 150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θ
JA
is specified for the worst-case conditions, that is, θ
JA
is specified
for a device soldered in a circuit board for surface-mount
packages. Table 6 lists the θ
JA
for the ADA4895-1/ADA4895-2.
Table 6. Thermal Resistance
Package Type θ
JA
Unit
8-Lead Single SOIC 133 °C/W
6-Lead Single SOT-23 150 °C/W
10-Lead Dual MSOP 210 °C/W
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation for the ADA4895-1/
ADA4895-2 is limited by the associated rise in junction
temperature (T
J
) on the die. At approximately 150°C, which is the
glass transition temperature, the properties of the plastic change.
Even temporarily exceeding this temperature limit can change
the stresses that the package exerts on the die, permanently
shifting the parametric performance of the ADA4895-1/
ADA4895-2. Exceeding a junction temperature of 175°C for an
extended period of time can result in changes in silicon devices,
potentially causing degradation or loss of functionality.
The power dissipated in the package (P
D
) is the sum of the
quiescent power dissipation and the power dissipated in the
die due to the ADA4895-1/ADA4895-2 drive at the output.
P
D
= Quiescent Power + (Total Drive Power Load Power)
The quiescent power dissipation is the voltage between the supply
pinsV
S
) multiplied by the quiescent current (I
S
).
( )
L
OUT
L
OUTS
SS
D
R
V
R
V
V
IVP
2
2
×+×=
Consider rms output voltages. If R
L
is referenced to −V
S
, as in
single-supply operation, the total drive power is V
S
× I
OUT
. In
single-supply operation with R
L
referenced to −V
S
, the worst
case is V
OUT
= V
S
/2.
If the rms signal levels are indeterminate, consider the worst case,
when V
OUT
= V
S
/4 with R
L
referenced to midsupply.
( )
( )
L
S
SS
D
R
V
IVP
2
4/
+×=
Airflow increases heat dissipation, effectively reducing θ
JA
. Also,
more metal directly in contact with the package leads reduces θ
JA
.
Figure 4 shows the maximum safe power dissipation in the package
vs. the ambient temperature on a JEDEC standard, 4-layer board.
θ
JA
values are approximations.
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
–40
–30
–20
–10
0
10
20
30
40
50
60
70
80
90
100
110
120
MAXIMUM POWER DISSIPATION (W)
AMBIENT TEMPERATUREC)
ADA4895-1 (SOIC)
ADA4895-1 (SOT-23)
ADA4895-2 (MSOP)
10186-003
Figure 4. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
ESD CAUTION