Datasheet

ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 Data Sheet
Rev. E | Page 16 of 24
Table 6. Recommended Component Values and Effect of Gain on ADA4891-3/ADA4891-4 Performance (R
L
= 1 kΩ)
Feedback Network Values −3 dB Small-Signal Bandwidth (MHz) Slew Rate (V/µs)
Peaking (dB)
Gain R
F
(Ω) R
G
(Ω) V
OUT
= 200 mV p-p t
R
t
F
−1 453 453 97 186 194 0.9
+1 0 Open 220 151 262 4.1
+2 453 453 97 181 223 0.9
+5 453 90.6 31 112 120 0
+10 453 45.3 13 68 67 0
EFFECT OF R
F
ON 0.1 dB GAIN FLATNESS
Gain flatness is an important specification in video applications.
It represents the maximum allowable deviation in the signal
amplitude within the pass band. Tests have revealed that the
human eye is unable to distinguish brightness variations of
less than 1%, which translates into a 0.1 dB signal drop within
the pass band or, put simply, 0.1 dB gain flatness.
The PCB layout configuration and bond pads of the chip often
contribute to stray capacitance. The stray capacitance at the
inverting input forms a pole with the feedback and gain resistors.
This additional pole adds phase shift and reduces phase margin
in the closed-loop phase response, causing instability in the
amplifier and peaking in the frequency response.
Figure 52 and Figure 53 show the effect of using various values
for Feedback Resistor R
F
on the 0.1 dB gain flatness of the parts.
Figure 52 shows the effect for the ADA4891-1/ADA4891-2.
Figure 53 show the effect for the ADA4891-3/ADA4891-4.
Note that a larger R
F
value causes more peaking because the
additional pole formed by R
F
and the input stray capacitance
shifts down in frequency and interacts significantly with the
internal poles of the amplifier.
–0.4
–0.3
–0.2
–0.1
0
0.1
0.2
10.1
10
100
FREQUENCY (MHz)
NORMALIZED CLOSED-LOOP GAIN (dB)
V
S
= 5V
G = +2
V
OUT
= 2V p-p
R
L
= 150Ω
R
G
= R
F
= 604
R
G
= R
F
= 549
R
G
= R
F
= 649
R
G
= R
F
= 698
08054-022
Figure 52. 0.1 dB Gain Flatness, Noninverting Gain Configuration,
ADA4891-1/ADA4891-2
–0.4
–0.5
–0.3
–0.2
–0.1
0
0.1
0.2
0.3
10.1 10 100
FREQUENCY
(MHz)
NORMALIZED CLOSED-LOOP GAIN (dB)
08054-085
V
S
= 5V
G = +2
V
OUT
= 2V p-p
R
L
= 150Ω
R
G
= R
F
= 453
R
G
= R
F
= 402
R
G
= R
F
= 357
R
G
= R
F
= 301
Figure 53. 0.1 dB Gain Flatness, Noninverting Gain Configuration,
ADA4891-3/ADA4891-4
To obtain the desired 0.1 dB bandwidth, adjust the feedback
resistor, R
F
, as shown in Figure 52 and Figure 53. If R
F
cannot
be adjusted, a small capacitor can be placed in parallel with R
F
to reduce peaking.
The feedback capacitor, C
F
, forms a zero with the feedback
resistor, which cancels out the pole formed by the input stray
capacitance and the gain and feedback resistors. For a first pass
in determining the C
F
value, use the following equation:
R
G
× C
S
= R
F
× C
F
where:
R
G
is the gain resistor.
C
S
is the input stray capacitance.
R
F
is the feedback resistor.
C
F
is the feedback capacitor.
Using this equation, the original closed-loop frequency response of
the amplifier is restored, as if there is no stray input capacitance.
Most often, however, the value of C
F
is determined empirically.
Figure 54 shows the effect of using various values for the
feedback capacitor to reduce peaking. In this case, the
ADA4891-1/ ADA4891-2 are used for demonstration purposes
and R
F
= R
G
= 604 Ω. The input stray capacitance, together with
the board parasitics, is approximately 2 pF.