Datasheet

ADA4853-1/ADA4853-2/ADA4853-3
Rev. F | Page 7 of 20
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Supply Voltage 5.5 V
Power Dissipation See Figure 6
Common-Mode Input Voltage −V
S
− 0.2 V to +V
S
− 1.2 V
Differential Input Voltage ±V
S
Storage Temperature Range −65°C to +125°C
Operating Temperature Range
6-Lead SC70 −40°C to +85°C
16-Lead LFCSP_VQ −40°C to +105°C
14-Lead TSSOP −40°C to +105°C
Lead Temperature JEDEC J-STD-20
Junction Temperature 150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θ
JA
is specified for the worst-case conditions, that is, θ
JA
is
specified for the device soldered in the circuit board for
surface-mount packages.
Table 4.
Package Type θ
JA
Unit
6-Lead SC70 430 °C/W
16-Lead LFCSP_VQ 63 °C/W
14-Lead TSSOP 120 °C/W
Maximum Power Dissipation
The maximum safe power dissipation for the ADA4853-1/
ADA4853-2/ADA4853-3 is limited by the associated rise in
junction temperature (T
J
) on the die. At approximately 150°C,
which is the glass transition temperature, the plastic changes its
properties. Even temporarily exceeding this temperature limit
can change the stresses that the package exerts on the die,
permanently shifting the parametric performance of the
amplifiers. Exceeding a junction temperature of 150°C for an
extended period can result in changes in silicon devices,
potentially causing degradation or loss of functionality.
The power dissipated in the package (P
D
) for a sine wave and a
resistor load is the total power consumed from the supply
minus the load power.
P
D
= Total Power Consumed − Load Power
( )
L
OUT
CURRENTSUPPLYVOLTAGESUPPLY
D
R
V
IVP
2
–×=
RMS output voltages should be considered.
Airflow increases heat dissipation, effectively reducing θ
JA
.
In addition, more metal directly in contact with the package
leads and through holes under the device reduces θ
JA
.
Figure 6 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the 6-lead SC70
(430°C/W), the 14-lead TSSOP (120°C/W), and the 16-lead
LFCSP_VQ (63°C/W) on a JEDEC standard 4-layer board. θ
JA
values are approximations.
3.0
0
125105856545255–15–35–55
AMBIENT TEMPERATURE (°C)
MAXIMUM POWER DISSIPATION (W)
2.5
2.0
1.5
1.0
0.5
SC70
TSSOP
LFCSP
05884-059
Figure 6. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
ESD CAUTION