Datasheet

ADA4853-1/ADA4853-2/ADA4853-3
Rev. F | Page 17 of 20
APPLICATIONS INFORMATION
SINGLE-SUPPLY VIDEO AMPLIFIER
With low differential gain and phase errors and wide 0.5 dB
flatness, the ADA4853-1/ADA4853-2/ADA4853-3 are ideal
solutions for portable video applications. Figure 51 shows a
typical video driver set for a noninverting gain of +2, where
R
F
= R
G
= 1 kΩ. The video amplifier input is terminated into a
shunt 75 Ω resistor. At the output, the amplifier has a series
75 Ω resistor for impedance matching to the video load.
When operating in low voltage, single-supply applications, the
input signal is only limited by the input stage headroom.
75Ω CABLE
V
OUT
75Ω
75Ω
V
IN
R
G
R
F
+V
S
P
D
U1
C1
2.2µF
C2
0.01µF
05884-043
+
V
Figure 51. Video Amplifier
POWER SUPPLY BYPASSING
Attention must be paid to bypassing the power supply pins of
the ADA4853-1/ADA4853-2/ADA4853-3. High quality capacitors
with low equivalent series resistance (ESR), such as multilayer
ceramic capacitors (MLCCs), should be used to minimize
supply voltage ripple and power dissipation. A large, usually
tantalum, 2.2 µF to 47 µF capacitor located in proximity to the
ADA4853-1/ADA4853-2/ADA4853-3 is required to provide
good decoupling for lower frequency signals. The actual value is
determined by the circuit transient and frequency requirements.
In addition, 0.1 µF MLCC decoupling capacitors should be
located as close to each of the power supply pins as is physically
possible, no more than ⅛ inch away. The ground returns should
terminate immediately into the ground plane. Locating the bypass
capacitor return close to the load return minimizes ground loops
and improves performance.
LAYOUT
As is the case with all high speed applications, careful attention
to printed circuit board (PCB) layout details prevents associated
board parasitics from becoming problematic. The ADA4853-1/
ADA4853-2/ADA4853-3 can operate at up to 100 MHz; there-
fore, proper RF design techniques must be employed. The PCB
should have a ground plane covering all unused portions of the
component side of the board to provide a low impedance return
path. Removing the ground plane on all layers from the area
near and under the input and output pins reduces stray capacit-
ance. Signal lines connecting the feedback and gain resistors
should be kept as short as possible to minimize the inductance
and stray capacitance associated with these traces. Termination
resistors and loads should be located as close as possible to their
respective inputs and outputs. Input and output traces should
be kept as far apart as possible to minimize coupling (crosstalk)
through the board. Adherence to microstrip or stripline design
techniques for long signal traces (greater than 1 inch) is
recommended. For more information on high speed board
layout, go to www.analog.com to view A Practical Guide to
High-Speed Printed-Circuit-Board Layout.