Datasheet

Data Sheet ADA4830-1/ADA4830-2
Rev. C | Page 7 of 22
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
NOTES
1. EXPOSED PAD ON BOTTOM SIDE
OF PACKAGE. NOT CONNECTED
ELECTRICALLY, BUT SHOULD BE
SOLDERED TO A METALIZED AREA
ON THE PCB TO MINIMIZE THERMAL
RESISTANCE.
3INN
4GND
1VREF
2INP
6 VOUT
5 STB
8 +VS
7 ENA
ADA4830-1
TOP VIEW
(Not to Scale)
10020-003
Figure 4. ADA4830-1 Pin Configuration
Table 5. ADA4830-1 Pin Function Descriptions
Pin No. Mnemonic Description
1 VREF Voltage Reference Input. Sets the output dc bias voltage. Internally biased to +V
S
/2 when left floating. See the
Applications Information section.
2 INP Positive Input.
3
INN
Negative Input.
4 GND Power Supply Ground Pin.
5 STB Short-to-Battery Indicator Output Pin. A logic low indicates an overvoltage condition (short-to-battery), whereas a
logic high indicates normal operation. An open-drain configuration requires external pull-up resistor.
6 VOUT Amplifier Output.
7 ENA Enable Pin. Connect to +V
S
or float for normal operation. Connect to ground for device disable.
8 +VS Positive Power Supply Pin. Bypass this pin with a 0.1 µF capacitor to ground.
EPAD Exposed Pad. The exposed pad is located on the bottom side of the package. The pad is not connected electrically
but should be soldered to a metalized area on the printed circuit board (PCB) to minimize thermal resistance.