Datasheet

ADA4830-1 Data Sheet
Rev. 0 | Page 6 of 16
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Figure 3. Pin Configuration
Table 5. Pin Function Descriptions
Pin No. Mnemonic Description
1 VREF Voltage Reference Input. Sets the output dc bias voltage. Internally biased to +Vs/2 when left floating. See the
Applications Information section.
2 INP Positive Input.
3 INN Negative Input.
4 GND Power Supply Ground Pin.
5 STB Short to Battery Indicator Pin. A logic low indicates an overvoltage condition (short to battery), whereas a logic
high indicates normal operation. An open-drain configuration requires external pull-up resistor.
6 VOUT Video Amplifier Output.
7 ENA Enable. Connect to +VS or float for normal operation. Connect to GND for device disable.
8 +VS Positive Power Supply. Bypass this pin with a 0.1 µF capacitor to GND.
EPAD Exposed Pad. The exposed pad is located on bottom side of package. The pad is not connected electrically but
should be soldered to a metalized area on the PCB to minimize thermal resistance.
NOTES
1. EXPOSED PAD ON BOTTOM SIDE
OF PACKAGE. NOT CONNECTED
ELECTRICALLY, BUT SHOULD BE
SOLDERED TO A METALIZED AREA
ON THE PCB TO MINIMIZE THERMAL
RESISTANCE.
3INN
4GND
1VREF
2INP
6 VOUT
5 STB
8 +VS
7 ENA
ADA4830-1
TOP VIEW
(Not to Scale)
10020-003