Datasheet

Data Sheet ADA4500-2
Rev. A | Page 23 of 24
Besides converting the ac signal from single-ended to differential,
this circuit separates the ac and dc part of the input signal and
automatically adjusts the common-mode dc level of the output
signal to the same voltage as V
REF
. The output signal is then a
differential version of the input signal with its common-mode
voltage set to an optimal value (such as, ½ the full-scale input
range to the ADC). The noninverted ac part of the signal is
output at OUTP, and the inverted ac signal is output at OUTN.
The differential output signal (OUTP to OUTN) is centered on
the voltage applied to REF. In this design, R3 and R4 set REF to
½V
POS
for maximum signal peak-to-peak swing; however, these
resistors can be eliminated, and the REF input can be driven
from an external source, such as a reference or the output of a
digital-to-analog converter (DAC).
The dc common-mode part of the input signal (V
DC
) was measured
using the voltage applied at REF and the voltage measured at the
feedback (FB) output using Equation 2. With V
CM
of the input
signal known to the system, it can respond appropriately to, for
example, a situation when the common mode is getting too close to
the rails.
V
DC
= (2 × FB) − (REF) (2)
10617-105
V
SY
OUTP
V
SY
U1A
ADA4500-2
R1B
1kΩ
R1A
1kΩ
C1
100pF
R2
2kΩ
C2
10pF
V
SY
U2A
ADA4500-2
R11
5kΩ
INPUT
R6
10kΩ
R5
10kΩ
C5
0.01µF
C3
1µF
C7
1µF
C6
1µF
REF
OUTN
FB
R10
5kΩ
V
SY
R9
5kΩ
R8
5kΩ
V
SY
R4
100kΩ
R3
100kΩ
U2B
U1B
V
REF
V
PP
OUTPUT
V
CM
V
PP
INPUT
V
CM_MAX
= 1.5 × V
SY
V
CM_MIN
= –0.5 × V
SY
V
PP_MAX
= V
SY
– 0.1V
EXAMPLES (V
SY
= 5V)
+2.5V
0V
+5V
V
PP
+7.5V
+5V
+10V
–2.5V
–5V
0V
OR
OUTP
OUTN
OUTP
OUTN
Figure 66. Single-Ended-to-Differential Conversion Circuit Separates the AC and DC Part of the Signal