Datasheet

ADA4077-2 Data Sheet
Rev. 0 | Page 14 of 20
Figure 48. Small Signal Overshoot vs. Load Capacitance
Figure 49. Positive Settling Time
Figure 50. Voltage Noise Density vs. Frequency
Figure 51. Small Signal Overshoot vs. Load Capacitance
Figure 52. Positive Settling Time
Figure 53. Voltage Noise Corner Frequency
0
50
10 100 1k 10k
OVERSHOOT (%)
LOAD CAPACITANCE (pF)
OS+
OS–
V
SY
= ±5V
V
IN
= 200mV p-p
A
V
= 1
R
L
= 2kΩ
5
10
15
20
25
30
35
40
45
10238-042
450
–100
–1 0 1 2 3 4
ERROR BAND VOLTAGE (mV)
INPUT VOLTAGE (V)
TIME (µs)
10238-149
V
SY
= ±5V
V
IN
= 1V p-p
A
V
= –1
INPUT
OUTPUT
0
0.2
0.4
0.6
0.8
1
1.2
–50
0
50
100
150
200
250
300
350
400
1k
100
10
1
10 10M1M100k10k1k100
VOLTAGE NOISE DENSITY (nV/√Hz)
FREQUENCY (Hz)
CH A
CH B
V
SY
= ±15V
A
V
= +1
10238-053
0
50
10 100 1k 10k
OVERSHOOT (%)
LOAD CAPACITANCE (pF)
OS+
OS–
V
SY
= ±15V
V
IN
= 200mV p-p
A
V
= 1
R
L
= 2kΩ
5
10
15
20
25
30
35
40
45
10238-045
500
400
300
200
100
0
–100
12
10
8
6
4
2
0
–5 0 5 10 15 20
ERROR BAND VOLTAGE (mV)
INPUT VOLTAGE (V)
TIME (µs)
10238-152
V
SY
= ±15V
V
IN
= 10V p-p
A
V
= –1
INPUT
OUTPUT
100
0
0 3.0
VOLTAGE NOISE CORNER (nV/√Hz)
FREQUENCY (Hz)
10238-153
10
20
30
40
50
60
70
80
90
0.5 1.0 1.5 2.0 2.5
V
SY
= ±15V