Datasheet

ADA4075-2 Data Sheet
Rev. C | Page 16 of 24
APPLICATIONS INFORMATION
INPUT PROTECTION
To prevent base-emitter junction breakdown from occurring in
the input stage of the ADA4075-2 when a very large differential
voltage is applied, the inputs are clamped by the internal diodes
to ±1.2 V. To preserve the ultralow voltage noise feature of the
ADA4075-2, the commonly used internal current-limiting
resistors in series with the inputs are not used.
In small signal applications, current limiting is not required;
however, in applications where the differential voltage of the
ADA4075-2 exceeds ±1.2 V, large currents may flow through
these diodes. Employ external current-limiting resistors as
shown in Figure 63 to reduce the input currents to less than
±10 mA. Note that depending on the value of these resistors,
the total voltage noise will most likely be degraded. For example,
a 1 kΩ resistor at room temperature has a thermal noise of
4 nV/√Hz, whereas the ADA4075-2 has an ultralow voltage
noise of only 2.8 nV/√Hz typical.
R2
R1
3
2
1
ADA4075-2
07642-050
Figure 63. Input Protection
TOTAL HARMONIC DISTORTION
The total harmonic distortion + noise (THD + N) of the
ADA4075-2 is 0.0002% typical with a load resistance of 2 kΩ.
Figure 64 shows the performance of the ADA4075-2 driving a
2 kΩ load with supply voltages of ±4 V and ±15 V. Notice that
there is more distortion for the supply voltage of ±4 V than for a
supply voltage of ±15 V. Therefore, it is important to operate the
ADA4075-2 at a supply voltage greater than ±5 V for optimum
distortion. The THD + noise graphs for supply voltages of ±5 V
and ±18 V are available in Figure 56 and Figure 61.
0.0001
0.001
0.01
0.1
1
10 100
1k 10k
100k
07642-069
FREQUENCY (Hz)
THD + NOISE (%)
V
SY
= ±4V
R
L
= 2kΩ
V
IN
= 1.5V rms
V
SY
= ±15V
R
L
= 2kΩ
V
IN
= 3V rms
Figure 64. THD + Noise vs. Frequency
PHASE REVERSAL
An undesired phenomenon, phase reversal (also known as phase
inversion) occurs in many op amps when one or both of the
inputs are driven beyond the specified input common-mode
voltage (V
ICM
) range, in effect reversing the polarity of the output.
In some cases, phase reversal can induce lockups and cause
equipment damage as well as self destruction.
The ADA4075-2 incorporates phase reversal prevention circuitry
that clamps the output to 2 V typical from the supply rails when
one or both inputs exceed the V
ICM
range. Figure 65 shows the
input/output waveforms of the ADA4075-2 configured as a unity-
gain buffer for a supply voltage of ±15 V.
07642-053
V
IN
V
OUT
VOLTAGE (5V/DIV)
TIME (40µs/DIV)
V
SY
= ±15V
Figure 65. No Phase Reversal