Datasheet

ADA4062-2/ADA4062-4
Rev. B | Page 12 of 20
–2
0
2
4
2
0
–2
INPUT
OUTPUT
OUTPUT VOLTAGE (V)
07670-037
INPUT VOLTAGE (V)
TIME (2µs/DIV)
V
SY
= ±5V
A
V
=–10
Figure 41. Positive Overload Recovery
07670-075
TIME (2µs/DIV)
VOLTAGE (1V/DIV)
+20mV
–20mV
0V
INPUT
OUTPUT
ERROR BAND
V
SY
= ±5V
C
L
= 100pF
R
L
= 10k
Figure 42. Positive Settling Time to 0.1%
07670-076
TIME (2µs/DIV)
VOLTAGE (1V/DIV)
+20mV
–20mV
0V
INPUT
OUTPUT
ERROR BAND
V
SY
= ±5V
C
L
= 100pF
R
L
= 10k
Figure 43. Negative Settling Time to 0.1%
–5
0
5
10
15
–2
0
2
INPUT
OUTPUT
OUTPUT VOLTAGE (V)
07670-034
INPUT VOLTAGE (V)
TIME (2µs/DIV)
V
SY
= ±15V
A
V
=–10
Figure 44. Positive Overload Recovery
07670-077
TIME (2µs/DIV)
VOLTAGE (5V/DIV)
+100mV
–100mV
0V
INPUT
OUTPUT
ERROR BAND
V
SY
= ±15V
C
L
= 100pF
R
L
= 10k
Figure 45. Positive Settling Time to 0.1%
07670-078
TIME (2µs/DIV)
VOLTAGE (5V/DIV)
+100mV
–100mV
0V
INPUT
OUTPUT
ERROR BAND
V
SY
= ±15V
C
L
= 100pF
R
L
= 10k
Figure 46. Negative Settling Time to 0.1%