Datasheet

ADA4051-1/ADA4051-2
T
A
= 25°C, unless otherwise noted.
Rev. B | Page 13 of 20
INPUT VOLTAGE (50mV/DIV)
OUTPUT VOLTAGE (500mV/DIV)
TIME (40µs/DIV)
V
SY
= ±0.9V
G = –10
INPUT VOLTAGE
OUTPUT VOLTAGE
–0.5
1.5
0.5
0
–0.15
0.05
0
–0.05
–0.10
1.0
INPUT VOLTAGE (100mV/DIV)
–0.3
–0.4
0.1
0
–0.1
–0.2
–1
3
4
1
0
2
08056-044
Figure 47. Negative Overload Recovery
INPUT VOLTAGE (500mV/DIV) OUTPUT VOLTAGE (5mV/DIV)
TIME (40µs/DIV)
V
SY
= ±0.9V
V
IN
= 1V p-p
R
L
= 10k
C
L
= 100pF
INPUT VOLTAGE
OUTPUT VOLTAGE
–5
5
0
08056-045
ERROR
BAND
Figure 48. Positive Settling Time to 0.1%
INPUT VOLTAGE (500mV/DIV) OUTPUT VOLTAGE (5mV/DIV)
TIME (40µs/DIV)
INPUT VOLTAGE
OUTPUT VOLTAGE
V
SY
= ±0.9V
V
IN
= 1V p-p
R
L
= 10k
C
L
= 100pF
08056-046
ERROR
BAND
–5
5
0
Figure 49. Negative Settling Time to 0.1%
OUTPUT VOLTAGE (1V/DIV)
TIME (40µs/DIV)
INPUT VOLTAGE
OUTPUT VOLTAGE
08056-047
V
SY
= ±2.5V
G = –10
Figure 50. Negative Overload Recovery
INPUT VOLTAGE
INPUT VOLTAGE (500mV/DIV) OUTPUT VOLTAGE (5mV/DIV)
TIME (40µs/DIV)
V
SY
= ±2.5V
V
IN
= 1V p-p
R
L
= 10k
C
L
= 100pF
OUTPUT VOLTAGE
–5
5
0
08056-048
ERROR
BAND
INPUT VOLTAGE (500mV/DIV) OUTPUT VOLTAGE (5mV/DIV)
–5
5
0
Figure 51. Positive Settling Time to 0.1%
TIME (40µs/DIV)
INPUT VOLTAGE
OUTPUT VOLTAGE
ERROR
BAND
V
SY
= ±2.5V
V
IN
= 1V p-p
R
L
= 10k
C
L
= 100pF
08056-049
Figure 52. Negative Settling Time to 0.1%