Datasheet
AD9974
Rev. A | Page 47 of 52
Table 29. Update Control Registers
Address
Data Bit
Content
Default
Value Update Name Description
0x60 [15:0] 1803 SCK AFE_UPDT_SCK
Enable SCK update of AFE registers. Each bit corresponds to one
address location.
AFE_UPDT_SCK[0] = 1, update Address 0x00 on SL rising edge.
AFE_UPDT_SCK[1] = 1, update Address 0x01 on SL rising edge.
…
AFE_UPDT_SCK[15] = 1, update Address 0x0F on SL rising edge.
[27:16] Unused Set unused register = 0 if accessed.
0x61 [15:0] E7FC SCK AFE_UPDT_VD
Enable VD update of AFE registers. Each bit corresponds to one
address location.
AFE_UPDT_VD[0] = 1, update Address 0x00 on VD rising edge.
AFE_UPDT_VD[1] = 1, update Address 0x01 on VD rising edge.
…
AFE_UPDT_VD[15] = 1, update Address 0x0F on VD rising edge.
[27:16] Unused Set unused register to 0 if accessed.
0x62 [15:0] F8FD SCK MISC_UPDT_SCK
Enable SCK update of miscellaneous registers. Address 0x10 to
Address 0x1F.
[27:16] Unused Set unused register to 0 if accessed.
0x63 [15:0] 0702 SCK MISC_UPDT_VD
Enable VD update of miscellaneous registers, Address 0x10 to
Address 0x1F.
[27:16] Unused Set unused register to 0 if accessed.
0x64 [15:0] FFF9 SCK VDHD_UPDT_SCK Enable SCK update of VDHD Registers, Address 0x20 to Address 0x22.
[27:16] Unused Set unused register to 0 if accessed.
0x65 [15:0] 0006 SCK VDHD_UPDT_VD Enable VD update of VDHD registers, Address 0x20 to Address 0x22.
[27:16] Unused Set unused register to 0 if accessed.
0x66 [15:0] FFFF SCK TGCORE_UPDT_SCK
Enable SCK update of timing core registers, Address 0x30 to
Address 0x37.
[27:16] Unused Set unused register to 0 if accessed.
0x67 [15:0] 0000 SCK TGCORE_UPDT_VD
Enable VD update of timing core registers, Address 0x30 to
Address 0x37.
[27:16] Unused Set unused register to 0 if accessed.
0x68 to
0x72
[27:0] SCK Unused Set unused register to 0 if accessed.
Table 30. HPAT Registers (HPAT Registers Always Start at Address 0x800)
Address
Data Bit
Content
Default
Value Update Name Description
0x00 [12:0] X SCP HBLKTOGO1 First HBLK Toggle Position for Odd Lines, or RA0H1REPA/B/C.
[25:13] X HBLKTOGO2 Second HBLK Toggle Position for Odd Lines, or RA1H1REPA/B/C.
[27:26] X Unused Set unused bits to 0.
0x01 [12:0] X SCP HBLKTOGO3 Third HBLK Toggle Position for Odd Lines, or RA2H1REPA/B/C.
[25:13] X HBLKTOGO4 Fourth HBLK Toggle Position for Odd Lines, or RA3H1REPA/B/C.
[27:26] X Unused Set unused bits to 0.
0x02 [12:0] X SCP HBLKTOGO5 Fifth HBLK Toggle Position for Odd Lines, or RA4H1REPA/B/C.
[25:13] X HBLKTOGO6 Sixth HBLK Toggle Position for Odd Lines, or RA5H1REPA/B/C.
[27:26] X Unused Set unused bits to 0.
0x03 [12:0] X SCP HBLKTOGE1 First HBLK Toggle Position for Even Lines, or RA0H2REPA/B/C.
[25:13] X HBLKTOGE2 Second HBLK Toggle Position for Even Lines, or RA1H2REPA/B/C.
[27:26] X Unused Set unused bits to 0.
0x04 [12:0] X SCP HBLKTOGE3 Third
HBLK Toggle Position for Even Lines, or RA2H2REPA/B/C.
[25:13] X HBLKTOGE4 Fourth HBLK Toggle Position for Even Lines, or RA3H2REPA/B/C.
[27:26] X Unused Set unused bits to 0.