Datasheet

AD9974
Rev. A | Page 39 of 52
3-WIRE SERIAL INTERFACE TIMING
All of the internal registers of the AD9974 are accessed through
a 3-wire serial interface. Each register consists of a 12-bit address
and a 28-bit data-word. Both the 12-bit address and 28-bit data-
word are written starting with the LSB. To write to each register,
a 40-bit operation is required, as shown in Figure 52. Although
many registers are fewer than 28 bits wide, all 28 bits must be
written for each register. For example, if the register is only 20 bits
wide, the upper eight bits are don’t cares and must be filled with
0s during the serial write operation. If fewer than 28 data bits
are written, the register is not updated with new data.
Figure 53 shows a more efficient way to write to the registers,
using the AD9974 address auto-increment capability. Using this
method, the lowest desired address is written first, followed by
multiple 28-bit data-words. Each new 28-bit data-word is
automatically written to the next highest register address. By
eliminating the need to write each 12-bit address, faster register
loading is achieved. Continuous write operations can be used,
starting with any register location.
A4 A5A2 A3SDATA A0A1 A6 A8A9A10A11
D0
D1 D2 D3 D25 D26 D27
SL
A7
t
LS
t
DS
12-BI
T
A
DDRESS
28-BIT DAT
A
5 406 7 8 9 10111213141516 3839
t
LH
t
DH
NOTES
1. SDATA BITS ARE LATCHED ON SCK RISING EDGES. SCK CAN IDLE HIGH OR LOW BETWEEN WRITE OPERATIONS.
2. ALL 40 BITS MUST BE WRITTEN: 12 BITS FOR ADDRESS AND 28 BITS FOR DATA.
3. IF THE REGISTER LENGTH IS <28 BITS, THEN ZEROS MUST BE USED TO COMPLETE THE 28-BIT DATA LENGTH.
4. NEW DATA VALUES ARE UPDATED IN THE SPECIFIED REGISTER LOCATION AT DIFFERENT TIMES, DEPENDING ON THE
PARTICULAR REGISTER WRITTEN TO. SEE THE UPDATING OF NEW REGISTER VALUES SECTION FOR MORE INFORMATION.
SCK
1234
05955-052
Figure 52. Serial Write Operation
SDATA A0A1A2 A10A11D0D1 D26D27
SCK
SL
A3
NOTES
1. MULTIPLE SEQUENTIAL REGISTERS CAN BE LOADED CONTINUOUSLY.
2. THE FIRST (LOWEST ADDRESS) REGISTER ADDRESS IS WRITTEN, FOLLOWED BY MULTIPLE 28-BIT DATA-WORDS.
3. THE ADDRESS AUTOMATICALLY INCREMENTS WITH EACH 28-BIT DATA-WORD (ALL 28 BITS MUST BE WRITTEN).
4. SL IS HELD LOW UNTIL THE LAST DESIRED REGISTER HAS BEEN LOADED.
D0 D1 D26 D27
D0
DATA FOR STARTING
REGISTER ADDRESS
DATA FOR NEXT
REGISTER ADDRESS
D2D1
1 402 3 4 11121314 39
4241 6867
70
69
71
0
5955-053
Figure 53. Continuous Serial Write Operation