Datasheet

AD9974
Rev. A | Page 38 of 52
A4
CLI_A
D1
REFB_A
C1
REFT_A
B2
SL_A
C2
SDATA_A
D2
SCK_A
E1
HD_A
E2
VD_A
E4
HVDD_A
E3
HVSS_A
F4
H1A
F3
H2A
D4
H3A
D3
H4A
F1
DVDD_A
F2
DVSS_A
G1
D0_A (LSB)
H1
D1_A
J1
D2_A
K1
D3_A
G2
D4_A
H2
D5_A
K2
D6_A
G3
D7_A
H3
D8_A
B7
AVSS_B
A9
CLI_B
D7
REFB_B
C7
REFT_B
B8
SL_B
C8
SDATA_B
D8
SCK_B
E7
HD_B
E8
VD_B
E10
HVDD_B
E9
HVSS_B
F10
H1B
F9
H2B
D10
H3B
D9
H4B
F7
DVDD_B
F8
DVSS_B
G7
D0_B (LSB)
H7
D1_B
J7
D2_B
K7
D3_B
G8
D4_B
H8
D5_B
K8
D6_B
G9
D7_B
J3
D9_A
K4
D10_A
J4
D11_A
H4
D12_A
G4
D13_A (MSB)
K3
DRVDD_A
J2
DRVSS_A
F5
GND
G5
GND
H5
GND
J5
GND
K5
GND
K6
GND
J6
GND
H6
GND
G6
GND
F6
GND
J8
DRVSS_B
K9
DRVDD_B
G10
D13_B (MSB)
H10
D12_B
J10
D11_B
K10
D10_B
J9
D9_B
H9
D8_B
B1
AVSS_A
A3
AVDD_A
C3
C4 B4
A5
LDO_OUT_A
B3
IOVDD_A
B5
GND
C5
GND
D5
GND
E5
GND
E6
GND
D6
GND
C6
GND
B6
GND
B9
B10
C10
C9
A8
AVDD_B
AD9974
1.8V ANALOG
SUPPLY
COMMON MASTER
CLOCK INPUT
VD COMMON INPUT
HD COMMON INPUT
3V
DRIVER
+
3V
DRIVER
4
1.8V ANALOG
SUPPLY
H1B–H4B
OUTPUTS
COMMON MASTE
R
CLOCK INPUT
VD COMMON INPUT
HD COMMON INPUT
4
CHN A DATA
OUTPUTS
14
CHN B DATA
OUTPUTS
14
3
RG_B DRIVER
SUPPLY
RG_B
RG_B OUTPUT
1.8V LDO OUTPUT B
1.8V ANALOG SUPPLY
RG_A
RG_A OUTPUT
1.8V LDO OUTPUT A
+
1.8V ANALOG
SUPPLY
3V IOVDD SUPPL
Y
NOT DRAWN TO SCALE
H1A–H4A
DRIVER
SUPPLY
SERIAL
INTERFACE
FOR CHN A
SERIAL
INTERFACE
FOR CHN B
H1B–H4B
DRIVER
SUPPLY
H1A–H4A
OUTPUTS
4.7µF
0.1µF
0.1µF
RGVDD_B RGVSS_B
0.1µF
LDO_OUT_B
0.1µF
3V IOVDD SUPPLY
IOVDD_B
0.1µF
0.1µF
RG_A DRIVER SUPPLY
+
4.7µF
RGVSS_A RGVDD_A
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
4.7µF
4.7µF 0.1µF
CCDINM_A CCDINP_A
CCD SIGNAL_A PLUS
A2
A1
A10
A6
A7
CCD SIGNAL_B PLUS
CCDINM_B CCDINP_B
0.1µF
0.1µF
Figure 51. Recommended Circuit Configuration