Datasheet

AD9957 Data Sheet
Rev. C | Page 26 of 64
In Figure 37, it can be seen that the sinc envelope introduces a
frequency dependent attenuation that can be as much as 4 dB at
the Nyquist frequency (half of the DAC sample rate). Without
the inverse sinc filter, the DAC output also suffers from the
frequency dependent droop of the sinc envelope. The inverse
sinc filter effectively flattens the droop to within ±0.05 dB as
shown in Figure 38, which shows the corrected sinc response
with the inverse sinc filter enabled.
1
0
–1
–2
–3
–4
0 0.1 0.2 0.40.3 0.5
06384-017
(dB)
FREQUENCY RELATIVE TO DAC SAMPLE RATE
INVERSE
SINC
SINC
Figure 37. Sinc and Inverse Sinc Responses
–2.8
–2.9
–3.0
–3.1
0 0.1 0.2 0.40.3 0.5
06384-018
(dB)
FREQUENCY RELATIVE TO DAC SAMPLE RATE
COMPENSATED RESPONSE
Figure 38. DAC Response with Inverse Sinc Compensation
OUTPUT SCALE FACTOR (OSF)
In QDUC and interpolating DAC modes, the output amplitude
is controlled using an 8-bit digital multiplier. The 8-bit multiplier
value is called the output scale factor (OSF) and is programmed
via the appropriate control registers. It is available for each of
the eight profiles. The LSB weight is 2
−7
, which yields a multiplier
range of 0 to 1.9921875 (2 − 2
−7
). The gain extends to nearly a
factor of 2 to provide a means to overcome the intrinsic loss
through the modulator when operating in the quadrature
modulation mode.
In interpolating DAC mode, the OSF should not be programmed
to exceed unity, as clipping can result. Programming the 8-bit
multiplier to unity gain (0x80) bypasses the stage and reduces
power consumption.
14-BIT DAC
The AD9957 incorporates an integrated 14-bit current-output
DAC. The output current is delivered as a balanced signal using
two outputs. The use of balanced outputs reduces the amount of
common-mode noise at the DAC output, increasing signal-to-
noise ratio. An external resistor (R
SET
) connected between the
DAC_RSET pin and AGND establishes a reference current. The
full-scale output current of the DAC (I
OUT
) is a scaled version of
the reference current (see the Auxiliary DAC section that
follows).
Proper attention should be paid to the load termination to keep
the output voltage within the specified compliance range, as
voltages developed beyond this range cause excessive distortion
and can damage the DAC output circuitry.
Auxiliary DAC
The full-scale output current of the main DAC (I
OUT
) is con-
trolled by an 8-bit auxiliary DAC. An 8-bit code word stored in
the appropriate register map location sets I
OUT
according to the
following equation:






+=
96
1
4.86 CODE
R
I
SET
OUT
(6)
where:
R
SET
is the value of the R
SET
resistor (in ohms).
CODE is the 8-bit value supplied to the auxiliary DAC (default
is 127).
For example, with R
SET
= 10,000 and CODE = 127, I
OUT
= 20.07 mA.