Datasheet
AD9956
Rev. A | Page 24 of 32
REGISTER MAP AND DESCRIPTION
Table 5.
Register
Name
(Serial
Address)
Bit
Range
(MSB) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1
Bit 0
(LSB)
Default
Value/
Profile
<31:24> Open
1
Open
1
Open
1
Open
1
Open
1
Open
1
Open
1
PLL Lock
Error
0x00
<23:16>
LOAD SRR @
I/O_UPDATE
Auto-Clr
Frequency
Accum.
Auto-
Clr
Phase
Accum.
Enable
Sine
Output
Clear
Frequency
Accum.
Clear
Phase
Accum.
Linear
Sweep
Enable
Linear
Sweep
No Dwell
0x00
<15:8> LSB First
SDI/O
Input
Only
Open
1
Open
1
Open
1
Open
1
Open
1
Open
1
0x00
Control
Function
Register 1
(CFR1)
(0x00)
<7:0>
Digital
Power-
Down
PFD Input
Power-
Down
PLLREF
Crystal
Enable
SYNC_CLK
Disable
Auto Sync
Multiple
AD9956s
Software
Manual
Sync
Hardware
Manual
Sync
High
Speed
Sync
Enable
0x00
<39:32>
DAC
Power-
Down
Open
1
Open
1
Open
1
Open
1
Open
1
Internal
Band Gap
Power-
Down
Internal
CML
Driver
DRV_RSET
0x00
<31:24> Clock Driver Rising Edge <31:29>
Clock Driver Falling Edge Control
<28:26>
PLL Lock
Detect
Enable
PLL Lock
Detect
Mode
0x00
<23:16>
RF Divider
Power-
Down
RF Divider Ratio
<22:21>
Clock
Driver
Power-
Down
Clock Driver Input
Select <19:18>
Slew Rate
Control
RF Div
REFCLK
Mux Bit
0x78
<15:8> Divider N Control <15:12> Divider M Control <11:8> 0x00
Control
Function
Register 2
(CFR2)
(0x01)
<7:0> Open
1
Open
1
CP
Polarity
CP
Full PD
CP
Quick PD
CP Current Scale <2:0> 0x07
<23:16> Rising Delta Frequency Tuning Word <23:16> 0x00
<15:8> Rising Delta Frequency Tuning Word <15:8> 0x00
Rising Delta
Frequency
Tuning
Word
(RDFTW)
(0x02)
<7:0> Rising Delta Frequency Tuning Word <7:0> 0x00
<23:16> Falling Delta Frequency Tuning Word <23:16> 0x00
<15:8> Falling Delta Frequency Tuning Word <15:8> 0x00
Falling Delta
Frequency
Tuning
Word
(FDFTW)
(0x03)
<7:0> Falling Delta Frequency Tuning Word <7:0> 0x00
<15:8> Rising Sweep Ramp Rate <15:8> 0x00
Rising
Sweep
Ramp Rate
(RSRR)
(0x04)
<7:0> Rising Sweep Ramp Rate <7:0> 0x00
<15:8> Rising Sweep Ramp Rate <15:8> 0x00
Falling
Sweep
Ramp Rate
(FSRR)
(0x05)
<7:0> Rising Sweep Ramp Rate <7:0> 0x00
1
In all cases, open bits must be written to 0.