Datasheet

AD9956
Rev. A | Page 16 of 32
TYPICAL APPLICATION CIRCUITS
DAC
PLLREF
PLLOSC
CP_OUT
DDS
÷N
÷M
÷R
LPF
VCO
CML
DRIVER
PHASE FREQUENCY
DETECTOR/CHARGE PUMP
25MHz
CRYSTAL
400MHz
CLOCK1
CLOCK1′
AD9956
04806-0-010
LPF
Figure 22. Dual-Clock Configuration
PLLREF
PLLOSC
CP_OUT
DDS
÷R
VCO
AD9956
04806-0-011
LPF
LPF
DAC
Figure 23. Fractional-Divider Loop
PLLREF
PLLOSC
CP_OUT
DDS
÷R
VCO
AD9956
04806-0-012
LPF
DAC
÷N
CML
DRIVER
2.5GHz
TONE
8-LEVEL FSK
(FC = 100MHz)
BPF
BPF
25MHz
CRYSTA
L
Figure 24. LO and Baseband Modulation Generation