Datasheet

AD9954
Rev. B | Page 38 of 40
5
4
3
2
1
VCCGND
DVDD
DVDD_I/O
AVDD
6
5
4
3
2
7
8
9
11
1
15
16
17
18
19
1D
74LVC574A74LVC574A74LVC574A
74LVC14A74LVC14A
U12U12
8D
6
5
4
3
2
7
8
9
1D
8D
1D
8D
C1
EN
W2
U9
11
1
C1
EN
U10
11
1
C1
EN
U11
14
13
12
15
16
17
18
19
14
13
12
15
16
17
18
19
14
13
12
5
6
7
8
9
4
3
2
1
28
29
30
31
32
27
33
34
35
36
26
25
20
21
22
23
24
10
11
12
13
16
17
18
14
15
19
A3
A4
A5
A6
A7
A2
A1
A0
C0
28
29
30
C2
B3
27
33
34
35
C3
26
25
20
21
22
23
24
B6
B7
B5
B4
16
17
18
C1
15
19
6
5
4
3
2
65
4321
7
8
9
PS1_DUT2
OSK_DUT1
OSK_DUT2
FUD_DUT1
FUD_DUT2
PS0_DUT2
PS1_DUT1
PS0_DUT1
PWRDWNCTRL_DUT2
CLKMODESEL_DUT1
CLKMODESEL_DUT2
RESET_DUT1
RESET_DUT2
PWRDWNCTRL_DUT1
I/O_SYNC_DUT2
I/O_SYNC_DUT1
CSB_DUT2
REF_CLK
CSB_DUT1
SCLK
SDI
VCC : 20
GND : 10
VCC
GND
VCC : 20
GND : 10
VCC : 20
GND : 10
TB5
U3
C68
0.1µF
C69
0.1µF
C70
0.1µF
C71
0.1µF
C72
0.1µF
GND
VCC
C26
10µF
GND
DVDD_I/O
C28
10µF
SCLK1
GND
VCC
C25
10µF
GND
AVDD
C27
10µF
GND
DVDD
J15
R32
0
R36
10k
R37
10k
DIGITAL LOGIC
REF CLK
74LVC14A
U12
8
VCC
GND
CLOCK F
CLOCK A
CLOCK D
VCC
SCLK1
VCC
9
74LVC14A
U12
1011
74LVC14A
C36CRPX
U12
U4
3
1
2
SDI
SDIO
SDO
RB_ENABLE
74LVC125A
U6
9
10
8
74LVC125A
U6
5
4
6
74LVC125A
U6
R35
10k
VCC
R34
10k
03374-035
Figure 37. Evaluation Board Interface Logic