Datasheet

AD9954
Rev. B | Page 3 of 40
FUNCTIONAL BLOCK DIAGRAM
FREQUENCY
ACCUMULATOR
STATIC RAM
1024 × 32
COS(X)
CONTROL REGISTERS
OSCILLATOR/BUFFER
COMPARATOR
SYNC
ENABLE
I/O UPDATE
DAC_R
SET
DDS CORE
PHASE
OFFSET
PHASE
ACCUMULATOR
Z
–1
Z
–1
IOUT
IOUT
OSK
PWRDWNCTL
COMP_OUT
COMP_IN
COMP_IN
REFCLK
REFCLK
CRYSTAL OUT I/O PORTPS<1:0>
RAM DATA
<31:18>
DDS
CLOCK
RAM
DATA
DELTA FREQUENCY TUNING WORD
FREQUENCY
TUNING WORD
RAM DATA
DDS CLOCK
DELTA FREQUENCY RAMP RATE
CLEAR PHASE
ACCUMULATOR
DAC
MUX
SYSTEM
CLOCK
SYSTEM
CLOCK
SYNC_IN
SYNC_CLK
RESET
TIMING AND CONTROL LOGIC
4× TO 20×
CLOCK
MULTIPLIER
÷4
AD9954
3232
32
14
14
14
32
R
A
M
A
D
D
R
E
S
S
10
RAM CONTROL
3
19 14
0
32
32
M
U
X
M
U
X
M
U
X
03374-001
θ
Figure 2.