Datasheet
Table Of Contents
- FEATURES
- APPLICATIONS
- GENERAL DESCRIPTION
- FUNCTIONAL BLOCK DIAGRAM
- SPECIFICATIONS
- ANALOG SPECIFICATIONS
- DIGITAL SPECIFICATIONS
- TIMING SPECIFICATIONS (SLAVE TIMING MODE)
- ABSOLUTE MAXIMUM RATINGS
- PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
- DATA BIT DESCRIPTIONS
- SERIAL INTERFACE TIMING
- SYSTEM OVERVIEW
- PRECISION TIMING, HIGH SPEED TIMING GENERATION
- APPLICATIONS INFORMATION
- OUTLINE DIMENSIONS

AD9940
Rev. 0 | Page 11 of 20
Address Data Bit Content Default Value Name Description
14 [2:0] 3 RGDRV RG drive strength (resolution = 2.2 mA/Step):
0 = Off
1 = 2.2 mA
2 = 4.4 mA
…
7 = 15.4 mA
[3] 0 RGPOL
RG polarity:
0 = normal
1 = inverted
[6:4] 3 HLDRV HL drive strength (Resolution = 2.2 mA/Step):
0 = off
1 = 2.2 mA
2 = 4.4 mA
…
7 = 15.4 mA
[7] 0 HLPOL
HL polarity:
0 = normal
1 = inverted
15 [5:0] 0 HLPOSLOC HL rising edge location
[7:6] — Unused
16 [5:0] 24 HLNEGLOC HL negative edge location
[7:6] 0 Unused
17 [5:0] 0 RGPOSLOC RG rising edge location
[7:6] — Unused
18 [5:0] 24 RGNEGLOC RG negative edge location
[7:6] — Unused
19 [3:0] 7 H2/H4DRV H2/H4 drive strength (resolution = 4.3 mA/Step):
0 = Off
1 = 4.3 mA
2 = 8.6 mA
…
15 =64.5 mA
[7:4] 7 H1/H3DRV H1/H3 drive strength (resolution = 4.3 mA/Step):
0 = Off
1 = 4.3 mA
2 = 8.6 mA
…
15 = 64.5 mA
20 [5:0] 0 H1POSLOC H1 positive edge location
[6] — Unused
[7] 0 H1/H3POL H1/H3 polarity:
0 = normal
1 = inverted
(H2/H4 is opposite polarity of H1/H3)
21 [5:0] 32 H1NEGLOC H1 negative edge location
[7:6] — Unused
22 [5:0] 32 SHPLOC SHP sampling location
[7:6] 0 Unused
23 [5:0] 0 SHDLOC SHD sampling location
[7:6] — Unused
24 [7:0] 0 TESTMODE Always set = 0
25 [7:0] 0 TESTMODE Always set = 0
26 [7:0] 0 TESTMODE Always set = 0