Datasheet

AD9923A
Rev. A | Page 9 of 84
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
A1 CORNER
INDEX AREA
1234567891011
A
B
C
D
E
F
G
H
J
K
L
AD9923A
TOP VIEW
(Not to Scale)
05586-004
Figure 4. 105-Lead CSPBGA Package Pin Configuration
Table 9. Pin Function Descriptions
Pin No. Mnemonic Type
1
Description
A7 AVDD P Analog Supply for AFE.
A1, A4, B2, B3, B4, B5, B6, B7 AVSS P Analog Ground for AFE.
B8 TCVDD P Analog Supply for Timing Core.
B9 TCVSS P Analog Ground for Timing Core.
E1 DVDD1 P Digital Logic Power Supply 1.
F2 DVSS1 P Digital Logic Ground 1.
K8, L7, L8 DVDD2 P Digital Logic Power Supply 2.
K9 DVSS2 P Digital Logic Ground 2.
D9 HVDD P H1 to H4, HL Driver Supply.
D10 HVSS P H1 to H4, HL Driver Ground.
B10 RGVDD P RG Driver Supply.
A10 RGVSS P RG Driver Ground.
L4 DRVDD P Data Output Driver Supply.
L5 DRVSS P Data Output Driver Ground.
J4 VDD1 P V-Driver Logic Supply 1.
K5 VSS1 P V-Driver Logic Ground 1.
L10 VDD2 P V-Driver Logic Supply 2.
K10 VSS2 P V-Driver Logic Ground 2.
F9 VH1 P V-Driver High Supply 1.
D1 VH2 P V-Driver High Supply 2.
E9 VL1 P V-Driver Low Supply 1.
C1 VL2 P V-Driver Low Supply 2.
C9 VM1 P V-Driver Mid Supply 1.
D3 VM2 P V-Driver Mid Supply 2.
F3 VLL P SUBCK Driver Low Supply.
E3 VMM P SUBCK Driver Mid Supply.
A6 CCDIN AI CCD Signal Input.
A5 CCDGND AI CCD Signal Ground.
A3 REFT AO Voltage Reference Top Bypass.
A2 REFB AO Voltage Reference Bottom Bypass.
C3 SL DI 3-Wire Serial Load Pulse.
C2 SCK DI 3-Wire Serial Clock.
B1 SDI DI 3-Wire Serial Data Input.
G7 SYNC DI External System Synchronization Input.
E5
RSTB
DI Reset Bar, Active Low Pulse.