Datasheet

AD9923A
Rev. A | Page 78 of 84
Address
(Hex)
Data
Bits
Default
Value Update Name Description
F3 [21:0] 3FE000 SCK STANDBY12POL
Programmable polarities for V-outputs and XSUBCK during Standby 1,
Standby 2, or if OUTCONTROL = low.
[0] = XV1 polarity.
[1] = XV2 polarity.
[2] = XV3 polarity.
[3] = XV4 polarity.
[4] = XV5 polarity.
[5] = XV6 polarity.
[6] = XV7 polarity.
[7] = XV8 polarity.
[8] = XV9 polarity.
[9] = XV10 polarity.
[10] = XV11 polarity.
[11] = XV12 polarity.
[12] = XV13 polarity.
[13] = VSG1 polarity.
[14] = VSG2 polarity.
[15] = VSG3 polarity.
[16] = VSG4 polarity.
[17] = VSG5 polarity.
[18] = VSG6 polarity.
[19] = VSG7 polarity.
[20] = VSG8 polarity.
[21] = XSUBCK polarity.
Table 55. Mode Register: VD Updated
Address (Binary) Data Bits Default Value Description
12b10_xx_xxxx_xxxx [37:0] 0 A11, A10 set to 10, remaining A9 to A0 bits used for D37:D28.
(Set A11, A10 = 10) [37:35] Number of fields (maximum of seven).
[34:30] Selected field for Field 7.
[29:25] Selected field for Field 6.
[24:20] Selected field for Field 5.
[19:15] Selected field for Field 4.
[14:10] Selected field for Field 3.
[9:5] Selected field for Field 2.
[4:0] Selected field for Field 1.