Datasheet

AD9920A
Rev. B | Page 12 of 112
Pin No. Mnemonic Type
1
Description
E11
SYNC/RST
DO SYNC Pin (Internal Pull-Up Resistor)/External Reset Input (Active Low).
K9 SL DI 3-Wire Serial Load Pulse (Internal Pull-Up Resistor).
K10 SDATA DI 3-Wire Serial Data.
L10 SCK DI 3-Wire Serial Clock.
B11 VDR_EN DI Enable V-Outputs When High.
K11 XSUBCNT DI XSUBCNT Input to SUBCK Buffer.
C9 SRSW DI Slew Rate Control Enable. Tie to ground to disable.
J6
LEGEN
DI Legacy Mode Enable Bar. Tie to ground for legacy 18-channel mode.
J5 CLI DI Reference Clock Input.
K5 CLO DO Clock Output for Crystal.
F10 GPO1 DO General-Purpose Output.
H9 GPO2 DO General-Purpose Output.
G10 GPO3 DO General-Purpose Output.
F11 GPO4 DO General-Purpose Output.
H10 GPO7 DO General-Purpose Output.
J11 GPO8 DO General-Purpose Output.
B9 D0 DO Data Output (LSB).
C6 D1 DO Data Output.
C7 D2 DO Data Output.
A8 D3 DO Data Output.
A7 D4 DO Data Output.
B7 D5 DO Data Output.
B6 D6 DO Data Output.
A6 D7 DO Data Output.
A5 D8 DO Data Output.
B4 D9 DO Data Output.
A4 D10 DO Data Output.
A3 D11 DO Data Output (MSB).
B3 DCLK DO Data Clock Output.
D1 H1 DO CCD Horizontal Clock.
D2 H2 DO CCD Horizontal Clock.
F1 H3 DO CCD Horizontal Clock.
F2 H4 DO CCD Horizontal Clock.
H1 H5 DO CCD Horizontal Clock.
H2 H6 DO CCD Horizontal Clock.
K1 H7 DO CCD Horizontal Clock.
K2 H8 DO CCD Horizontal Clock.
L2 HL DO CCD Horizontal Clock.
L4 RG DO CCD Reset Gate Clock.
G9 V1A VO3 CCD Vertical Transfer Clock. Three-level output (XV1 + XV16).
G6 V1B VO3 CCD Vertical Transfer Clock. Three-level output (XV1 + XV17).
G5 V2A VO3 CCD Vertical Transfer Clock. Three-level output (XV2 + XV18).
E9 V2B VO3 CCD Vertical Transfer Clock. Three-level output (XV2 + XV19).
J9 V3A VO3 CCD Vertical Transfer Clock. Three-level output (XV3 + XV20).
F6 V3B VO3
CCD Vertical Transfer Clock. Three-level output. LEGEN
is low, XV3 + XV21. LEGEN is high,
XV23 + XV21.
F5 V4 VO3 CCD Vertical Transfer Clock. Three-level output (XV4 + XV22).
E5 V5 VO3
CCD Vertical Transfer Clock. Three-level output. LEGEN
is low, XV5 + XV23. LEGEN is high,
XV5 + GPO5.
D10 V6 VO3
CCD Vertical Transfer Clock. Three-level output. LEGEN
is low, XV6 + XV24. LEGEN is high,
XV6 + GPO6.
F9 V7 VO2 CCD Vertical Transfer Clock. Two-level output (XV7).
F7 V8 VO2 CCD Vertical Transfer Clock. Two-level output (XV8).