Datasheet

AD9913
Rev. A | Page 10 of 32
80
0
50 250
07002-036
SYSTEM CLOCK FREQUENCY (MHz)
TOTAL POWER DISSIPATED (mW)
70
60
50
40
30
20
10
70 90 110 130 150 170 190 210 230
DIFF INPUT LINEAR SWEEP
CMOS INPUT LINEAR SWEEP
DIFF INPUT SINGLE TONE
CMOS INPUT SINGLE TONE
−160
100 100M
FREQUENCY (MHz)
PHASE NOISE (dBc/Hz)
−60
−80
−140
1k 10k 100k 1M 10M
−100
VCO 1
VCO 2
−120
07002-011
Figure 16. Power Dissipation vs. System Clock Frequency
vs. Clock Input Mode
Figure 14. Absolute Phase Noise, VCO1 vs. VCO2
40
0
50 250
07002-035
SYSTEM CLOCK FREQUENCY (MHz)
POWER DISSIPATION (mW)
35
30
25
20
15
10
5
70 90 110 130 150 170 190 210 230
DVDD
AVDD (PLL)
AVDD (CLK)
AVDD (DAC)
AVDD (DAC CLK)
Figure 15. Power Supply Current Domains
(CMOS Input Mode, 4 mA DAC Full-Scale Current, Single Tone)