Datasheet

AD9910 Data Sheet
Rev. D | Page 6 of 64
SPECIFICATIONS
ELECTRICAL SPECIFICATIONS
AVDD (1.8 V) and DVDD (1.8 V) = 1.8 V ± 5%, AVDD (3.3 V) = 3.3 V ± 5%, DVDD_I/O (3.3 V) = 3.3 V ± 5%, T = 25°C, R
SET
= 10 kΩ,
I
OUT
= 20 mA, external reference clock frequency = 1000 MHz with reference clock (REFCLK) multiplier disabled, unless otherwise noted.
Table 1.
Parameter Conditions/Comments Min Typ Max Unit
REFCLK INPUT CHARACTERISTICS
Frequency Range
REFCLK Multiplier Disabled 60 1000 MHz
Enabled 3.2 60 MHz
Maximum REFCLK Input Divider Frequency Full temperature range 1500 1900 MHz
Minimum REFCLK Input Divider Frequency Full temperature range 25 35 MHz
External Crystal 25 MHz
Input Capacitance 3 pF
Input Impedance Differential 2.8 kΩ
Single-ended 1.4 kΩ
Duty Cycle REFCLK multiplier disabled 45 55 %
REFCLK multiplier enabled 40 60 %
REFCLK Input Level
Single-ended
50
1000
mV p-p
Differential
100
2000
mV p-p
REFCLK MULTIPLIER VCO CHARACTERISTICS
VCO Gain (K
V
) @ Center Frequency VCO range Setting 0 429 MHz/V
VCO range Setting 1 500 MHz/V
VCO range Setting 2 555 MHz/V
VCO range Setting 3 750 MHz/V
VCO range Setting 4 789 MHz/V
VCO range Setting 5
1
850 MHz/V
REFCLK_OUT CHARACTERISTICS
Maximum Capacitive Load 20 pF
Maximum Frequency 25 MHz
DAC OUTPUT CHARACTERISTICS
Full-Scale Output Current 8.6 20 31.6 mA
Gain Error −10 +10 % FS
Output Offset 2.3 µA
Differential Nonlinearity 0.8 LSB
Integral Nonlinearity 1.5 LSB
Output Capacitance 5 pF
Residual Phase Noise @ 1 kHz offset, 20 MHz A
OUT
REFCLK Multiplier Disabled −152 dBc/Hz
Enabled @ 20×
−140
dBc/Hz
Enabled @ 100× −140 dBc/Hz
Voltage Compliance Range −0.5 +0.5 V
Wideband SFDR See the Typical Performance
Characteristics section
Narrow-Band SFDR
50.1 MHz Analog Output ±500 kHz –87 dBc
±125 kHz –87 dBc
±12.5 kHz –96 dBc
101.3 MHz Analog Output ±500 kHz –87 dBc
±125 kHz –87 dBc
±12.5 kHz
–95
dBc