Datasheet

AD9910 Data Sheet
Rev. D | Page 40 of 64
WAVEFORM START ADDRESS
WAVEFORM END ADDRESS
1
Δ t
Δ
t
RAM ADRESS
RAM_SWP_OVER
I/O_UPDATE
M DDS CLOCK CYCLES
1
2 3
06479-028
Figure 47. Continuous Bidirectional Ramp Timing Diagram
A change in state of the PROFILE pins aborts the current wave-
form, and the newly selected RAM profile is used to initiate a
new waveform.
The RAM_SWP_OVR pin switches to Logic 1 when the state
machine reaches the waveform end address, then returns to
Logic 0 at the waveform start address, toggling each time one
of these addresses is reached.
A graphic representation of the continuous bidirectional ramp
mode is shown in Figure 47. The circled numbers indicate specific
events as follows:
Event 1—An I/O update or profile change has activated the RAM
continuous bidirectional ramp mode. The state machine initializes
to the waveform start address. The RAM_SWP_OVR pin resets to
Logic 0. The state machine begins incrementing through the
specified address range.
Event 2—The state machine reaches the waveform end address.
The RAM_SWP_OVR pin toggles to Logic 1.
Event 3—The state machine reaches the waveform start address.
The RAM_SWP_OVR pin toggles to Logic 0.
The continuous bidirectional ramp continues indefinitely until
the mode is changed.