Datasheet

Data Sheet AD9910
Rev. D | Page 15 of 64
–90
–100
–110
–120
–130
–140
–150
–160
10 100 1k 10k 100k 1M 10M
100M
06479-043
MAGNITUDE (dBc/ Hz)
FREQUENCY OFFSET (Hz)
f
OUT
= 20.1MHz
f
OUT
= 397.8MHz
f
OUT
= 98.6MHz
f
OUT
= 201.1MHz
Figure 16. Residual Phase Noise,
1 GHz Operation Using a 50 MHz Reference Clock with 20× PLL Multiplier
400
450
300
250
350
200
150
100
50
0
100 200 300 400 500 600 700 800 900 1000
06479-044
POWER DISSIPATION (mW)
SYSTEM CLOCK FREQUENCY (MHz)
DVDD 3.3V
AVDD 3.3V
AVDD 1.8V
DVDD 1.8V
Figure 17. Power Dissipation vs. System Clock Frequency (PLL Disabled)
400
450
300
250
350
200
150
100
50
0
400 500 600 700 800 900 1000
06479-045
POWER DISSIPATION (mW)
SYSTEM CLOCK FREQUENCY (MHz)
DVDD 1.8V
AVDD 1.8V
AVDD 3.3V
DVDD 3.3V
Figure 18. Power Dissipation vs. System Clock Frequency (PLL Enabled)