Datasheet

AD9888 Data Sheet
Rev. C | Page 20 of 36
P0 P1 P2 P3 P4 P5 P6 P7
D0
RGB INPUT
HSYNC
PXCK
HS
ADCCK
(INTERNAL)
DATACK
DOUTA
HSOUT
DOUTB
D2
D6
D4
VARIABLE DURATION
8 PIPELINE DELAY
02442-022
Figure 23. Dual-Port Mode, Parallel Outputs, Two Pixels/Clock (Even Pixels)
P0 P1 P2 P3 P4 P5 P6 P7
D1
D5
RGB INPUT
HSYNC
PXCK
HS
ADCCK
(INTERNAL)
DATACK
GOUTA
HSOUT
ROUTA
D3
D7
VARIABLE DURATION
6.5 PIPELINE DELAY
02442-023
Figure 24. Dual-Port Mode, Parallel Outputs, Two Pixels/Clock (Odd Pixels)
P0 P1 P2 P3 P4 P5 P6 P7
U0 V0 U2 V2 U4
RGB INPUT
HSYNC
PXCK
HS
ADCCK
(INTERNAL)
DATACK
ROUTA
HSOUT
Y0 Y1 Y2 Y3 Y4
GOUTA
V4
Y5
VARIABLE DURATION
8 PIPELINE DELAY
02442-024
Figure 25. 4:2:2 Output Mode