Datasheet

AD9888 Data Sheet
Rev. C | Page 18 of 36
P0 P1 P2 P3 P4 P5 P6 P7
D0 D2 D4 D6
RGB INPUT
HSYNC
PXCK
HS
ADCCK
(INTERNAL)
DATACK
DOUTA
HSOUT
VARIABLE DURATION
8 PIPELINE DELAY
02442-016
Figure 17. Single-Port Mode, Two Pixels/Clock (Even Pixels)
P0 P1 P2 P3 P4 P5 P6 P7
D1 D3 D5
D7
RGB INPUT
HSYNC
PXCK
HS
ADCCK
(INTERNAL)
DATACK
DOUTA
HSOUT
8.5 PIPELINE DELAY
VARIABLE DURATION
02442-017
Figure 18. Single-Port Mode, Two Pixels/Clock (Odd Pixels)
P0 P1 P2 P3 P4 P5 P6 P7
D0 D2 D4
D1 D3 D5
RGB INPUT
HSYNC
PXCK
HS
ADCCK
(INTERNAL)
DATACK
DOUTA
HSOUT
DOUTB
VARIABLE DURATION
7 PIPELINE DELAY
02442-018
Figure 19. Dual-Port Mode, Interleaved Outputs