Datasheet

REV. 0
–2–
AD9887–SPECIFICATIONS
ANALOG INTERFACE
Test AD9887KS-100 AD9887KS-140
Parameter Temp Level Min Typ Max Min Typ Max Unit
RESOLUTION 8 8 Bits
DC ACCURACY
Differential Nonlinearity 25°CI ± 0.5 +1.15/–1.0 ±0.5 +1.25/–1.0 LSB
Full VI +1.15/–1.0 +1.25/–1.0 LSB
Integral Nonlinearity 25°CI ± 0.5 ± 1.40 ± 0.5 ± 1.4 LSB
Full VI ± 1.75 ± 2.5 LSB
No Missing Codes Full VI Guaranteed Guaranteed
ANALOG INPUT
Input Voltage Range
Minimum Full VI 0.5 0.5 V p-p
Maximum Full VI 1.0 1.0 V p-p
Gain Tempco 25°C V 135 150 ppm/°C
Input Bias Current 25°CIV 1 1 µA
Full IV 1 1 µA
Input Offset Voltage Full VI 7 50 7 50 mV
Input Full-Scale Matching Full VI 8.0 8.0 % FS
Offset Adjustment Range Full VI 44 50 56 44 50 56 % FS
REFERENCE OUTPUT
Output Voltage Full VI 1.20 1.25 1.30 1.20 1.25 1.30 V
Temperature Coefficient Full V ± 50 ± 50 ppm/°C
SWITCHING PERFORMANCE
1
Maximum Conversion Rate Full VI 100 140 MSPS
Minimum Conversion Rate Full IV 10 10 MSPS
Clock to Data Skew, t
SKEW
Full IV –0.5 +2.0 –0.5 +2.0 ns
t
BUFF
Full VI 4.7 4.7 µs
t
STAH
Full VI 4.0 4.0 µs
t
DHO
Full VI 0 0 µs
t
DAL
Full VI 4.7 4.7 µs
t
DAH
Full VI 4.0 4.0 µs
t
DSU
Full VI 250 250 ns
t
STASU
Full VI 4.7 4.7 µs
t
STOSU
Full VI 4.0 4.0 µs
HSYNC Input Frequency Full IV 15 110 15 110 kHz
Maximum PLL Clock Rate Full VI 100 140 MHz
Minimum PLL Clock Rate Full IV 12 12 MHz
PLL Jitter 25°C IV 400 700
2
400 700
3
ps p-p
Full IV 1000
2
1000
3
ps p-p
Sampling Phase Tempco Full IV 15 15 ps/°C
DIGITAL INPUTS
Input Voltage, High (V
IH
) Full VI 2.6 2.6 V
Input Voltage, Low (V
IL
) Full VI 0.8 0.8 V
Input Current, High (V
IH
) Full IV –1.0 –1.0 µA
Input Current, Low (V
IL
) Full IV 1.0 1.0 µA
Input Capacitance 25°CV 3 3 pF
DIGITAL OUTPUTS
Output Voltage, High (V
OH
) Full VI 2.4 2.4 V
Output Voltage, Low (V
OL
) Full VI 0.4 0.4 V
Duty Cycle
DATACK, DATACK Full IV 45 50 55 45 50 55 %
Output Coding Binary Binary
(V
D
= 3.3 V, V
DD
= 3.3 V, ADC Clock = Maximum Conversion Rate, unless otherwise noted.)
OBSOLETE