Datasheet

AD9880
Rev. 0 | Page 7 of 64
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
05087-002
V
DD
RED 0 RED 1 RED 2 RED 3 RED 4 RED 5 RED 6 RED 7 GND V
DD
DATACLK DE HSOUT SOGOUT VSOUT O/E FIELD SDA SCL PWRDN V
D
R
AIN0
GND R
AIN1
V
D
26
I2S1
27
I2S0
28
S/PDIF
29
GND
30
DV
DD
31
GND
32
DV
DD
33
V
D
34
RX0–
35
RX0+
36
GND
37
RX1–
38
RX1+
39
GND
2
GREEN 7
3
GREEN 6
4
GREEN 5
7
GREEN 2
6
GREEN 3
5
GREEN 4
1
GND
8
GREEN 1
9
GREEN 0
10
V
DD
12
BLUE 7
13
BLUE 6
14
BLUE 5
15
BLUE 4
16
BLUE 3
17
BLUE 2
18
BLUE 1
19
BLUE 0
20
MCLKIN
21
MCLKOUT
22
SCLK
23
LRCLK
24
I2S3
25
I2S2
11
GND
74
G
AIN0
GND
73
SOGIN0
72
V
D
69
GND
70
SOGIN1
71
G
AIN1
75
68
B
AIN0
67
V
D
66
B
AIN1
64
HSYNC 0
63
HSYNC 1
62
EXTCLK/COAST
61
VSYNC 0
60
VSYNC 1
59
PV
DD
58
GND
57
FILT
56
PV
DD
55
GND
54
PV
DD
53
ALGND
52
MDA
51
MCL
65
GND
40
RX2–
41
RX2+
42
GND
43
RxC+
44
RxC–
45
V
D
46
RTERM
47
GND
48
DV
DD
49
DDC_SCL
50
DDC_SDA
100
99
98
97 96
95
94
93 92
91 90
89 88 87
86 85
84
83
82 81
80 79
78 77 76
PIN 1
AD9880
TOP VIEW
(Not to Scale)
Figure 2. Pin Configuration
Table 4. Complete Pinout List
Pin Type Pin No. Mnemonic Function Value
INPUTS 79 R
AIN0
Analog Input for Converter R Channel 0 0.0 V to 1.0 V
77 R
AIN1
Analog Input for Converter R Channel 1 0.0 V to 1.0 V
74 G
AIN0
Analog Input for Converter G Channel 0 0.0 V to 1.0 V
71 G
AIN1
Analog Input for Converter G Channel 1 0.0 V to 1.0 V
68 BB
AIN0
Analog Input for Converter B Channel 0 0.0 V to 1.0 V
66 BB
AIN1
Analog Input for Converter B Channel 1 0.0 V to 1.0 V
64 HSYNC0 Horizontal SYNC Input for Channel 0 3.3 V CMOS
63 HSYNC1 Horizontal SYNC Input for Channel 1 3.3 V CMOS
61 VSYNC0 Vertical SYNC Input for Channel 0 3.3 V CMOS
60 VSYNC1 Vertical SYNC Input for Channel 1 3.3 V CMOS
73 SOGIN0 Input for Sync-on-Green Channel 0 0.0 V to 1.0 V
70 SOGIN1 Input for Sync-on-Green Channel 1 0.0 V to 1.0 V
62 EXTCLK External Clock Input—Shares Pin with COAST 3.3 V CMOS
62 COAST PLL COAST Signal Input—Shares Pin with EXTCLK 3.3 V CMOS
81 PWRDN Power-Down Control 3.3 V CMOS