Datasheet

AD9880
Rev. 0 | Page 3 of 64
SPECIFICATIONS
ANALOG INTERFACE ELECTRICAL CHARACTERISTICS
V
DD,
V
D
= 3.3 V, DV
DD
= PV
DD
= 1.8 V, ADC clock = maximum.
Table 1.
AD9880KSTZ-100 AD9880KSTZ-150
Parameter Temp Test Level Min Typ Max Min Typ Max Unit
RESOLUTION 8 8 Bits
DC ACCURACY
Differential Nonlinearity 25°C I –0.6
+1.6/–
1.0
±0.7
+1.8/–
1.0
LSB
Integral Nonlinearity 25°C I ±1.0 ±2.1 ±1.1 ±2.25 LSB
No Missing Codes Full Guaranteed Guaranteed
ANALOG INPUT
Input Voltage Range
Minimum Full VI 0.5 0.5 V p–p
Maximum Full VI 1.0 1.0 V p–p
Gain Tempco +25°C V 100 220 ppm/°C
Input Bias Current +25°C V 0.2 1 μA
Input Full-Scale Matching
25C
Full
VI
VI
1.25
1.50
5
7
1.25
1.50
5
7
%FS
%FS
Offset Adjustment Range Full V 50 50 %FS
SWITCHING PERFORMANCE
1
Maximum Conversion Rate Full VI 100 150 MSPS
Minimum Conversion Rate Full VI 10 10 MSPS
Data to Clock Skew Full IV −0.5 +2.0 −0.5 +2.0 ns
Serial Port Timing
t
BUFF
Full VI 4.7 4.7 μs
t
STAH
Full VI 4.0 4.0 μs
t
DHO
Full VI 0 0 μs
t
DAL
Full VI 4.7 4.7 μs
t
DAH
Full VI 4.0 4.0 μs
t
DSU
Full VI 250 250 ns
t
STASU
Full VI 4.7 4.7 μs
t
STOSU
Full VI 4.0 4.0 μs
HSYNC Input Frequency Full VI 15 110 15 110 KHz
Maximum PLL Clock Rate Full VI 100 150 MHz
Minimum PLL Clock Rate Full IV 12 12 MHz
PLL Jitter +25°C IV 700 700 ps p-p
Sampling Phase Tempco Full IV 15 15 ps/°C
DIGITAL INPUTS: (5V tolerant)
Input Voltage, High (V
IH
) Full VI 2.6 2.6 V
Input Voltage, Low (V
IL
) Full VI 0.8 0.8 V
Input Current, High (I
IH
) Full V -82 -82 μA
Input Current, Low (I
IL
) Full V 82 82 μA
Input Capacitance 25°C V 3 3 pF
DIGITAL OUTPUTS
Output Voltage, High (V
OH
) Full VI V
DD
− 0.1 V
DD
− 0.1 V
Output Voltage, Low (V
OL
) Full VI 0.4 0.4 V
Duty Cycle, DATACK Full V 45 50 55 45 50 55 %
Output Coding Binary Binary
POWER SUPPLY
V
D
Supply Voltage Full IV 3.15 3.3 3.47 3.15 3.3 3.47 V
DV
DD
Supply Voltage Full IV 1.7 1.8 1.9 1.7 1.8 1.9 V