Datasheet

AD9859
Rev. A | Page 12 of 24
DAC Output
The AD9859 incorporates an integrated 10-bit current output
DAC. Unlike most DACs, this output is referenced to AVDD,
not AGND.
Two complementary outputs provide a combined full-scale
output current (I
OUT
). Differential outputs reduce the amount of
common-mode noise that might be present at the DAC output,
offering the advantage of an increased signal-to-noise ratio. The
full-scale current is controlled by an external resistor (R
SET
)
connected between the DAC_R
SET
pin and the DAC ground
(AGND_DAC). The full-scale current is proportional to the
resistor value as follows:
OUTSET
IR /19.39=
The maximum full-scale output current of the combined DAC
outputs is 15 mA, but limiting the output to 10 mA provides the
best spurious-free dynamic range (SFDR) performance. The DAC
output compliance range is AVDD + 0.5 V to AVDD 0.5 V.
Voltages developed beyond this range cause excessive DAC
distortion and could potentially damage the DAC output
DJSDVJ
try. Proper attention should be paid to the load UFSNJOBUJPOUP
keep the output voltage within this compliance SBOHF
Serial I/O Port
The AD9859 serial port is a flexible, synchronous serial
communications port that allows easy interface to many industry-
standard microcontrollers and microprocessors. The serial I/O port
is compatible with most synchronous transfer formats, including
both the Motorola 6905/11 SPI® and Intel® 8051 SSR protocols.
The interface allows read/write access to all registers that configure
the AD9859. MSB first or LSB first transfer formats are supported.
The AD9859s serial interface port can be configured as a single pin
I/O (SDIO), which allows a 2-wire interface or two unidirectional
pins for in/out (SDIO/SDO), which in turn enables a 3-wire
interface. Two optional pins, IOSYNC and
CS
Register Map and Descriptions
, enable greater
flexibility for system design in the AD9859.
The register map is listed in Table 5.