Datasheet
Table Of Contents
- FEATURES
- APPLICATIONS
- FUNCTIONAL BLOCK DIAGRAM
- REVISION HISTORY
- GENERAL DESCRIPTION
- SPECIFICATIONS
- ABSOLUTE MAXIMUM RATINGS
- PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
- TYPICAL PERFORMANCE CHARACTERISTICS
- TYPICAL APPLICATIONS
- MODES OF OPERATION
- USING THE AD9852
- PROGRAMMING THE AD9852
- GENERAL OPERATION OF THE SERIAL INTERFACE
- POWER DISSIPATION AND THERMAL CONSIDERATIONS
- EVALUATION OF OPERATING CONDITIONS
- EVALUATION BOARD
- EVALUATION BOARD INSTRUCTIONS
- GENERAL OPERATING INSTRUCTIONS
- Hardware Preparation
- Clock Input, J25
- Three-State Control
- Programming
- Low-Pass Filter Testing
- Observing the Unfiltered IOUT1 and the Unfiltered IOUT2 DAC Signals
- Observing the Filtered IOUT1 and the Filtered IOUT2
- Observing the Filtered IOUT1 and the Filtered IOUT1
- Connecting the High Speed Comparator
- Single-Ended Configuration
- USING THE PROVIDED SOFTWARE
- SUPPORT
- OUTLINE DIMENSIONS

AD9852
Rev. E | Page 3 of 52
REVISION HISTORY
5/07—Rev. D to Rev. E
Changed AD9852ASQ to AD9852ASVZ ....................... Universal
Changed AD9852AST to AD9852ASTZ.........................Universal
Change to Features............................................................................1
Changes to Endnote 10 of Table 1...................................................7
Changes to Absolute Maximum Ratings........................................8
Added Thermal Resistance Section ................................................8
Change to Ramped FSK (Mode 010) Section..............................19
Change to Internal and External Update Clock Section............27
Change to Thermal Impedance Section.......................................38
Changes to Junction Temperature Considerations Section.......38
Changes to Thermally Enhanced Package Mounting
Guidelines Section......................................................................40
Deleted Figure 61 to Figure 64 ......................................................41
Changes to Table 14 ........................................................................44
Updated Outline Dimensions........................................................51
Changes to Ordering Guide...........................................................52
12/05—Rev. C to Rev. D
Updated Format..................................................................Universal
Changes to General Description .....................................................4
Changes to Explanation of Test Levels Section .............................9
Change to Pin Configuration ........................................................10
Changes to Figure 65 ......................................................................47
Changes to Outline Dimensions ...................................................52
Changes to Ordering Guide...........................................................52
4/04—Rev. B to Rev. C
Updated Format..................................................................Universal
Changes to Figure 1...........................................................................1
Changes to General Description .....................................................3
Changes to Table 1 ............................................................................4
Changes to Footnote 2 ......................................................................6
Changes to Figure 2...........................................................................8
Changes to Table 5 ..........................................................................17
Changes to Equation in Ramped FSK (Mode 010).....................19
Changes to Evaluation Board Instructions..................................39
Changes to General Operating Instructions Section..................39
Changes to Using the Provided Software Section.......................42
Changes to Figure 65 ......................................................................43
Changes to Figure 66 ......................................................................44
Changes to Figure 72 and Figure 73 .............................................48
Changes to Ordering Guide...........................................................48
3/02—Rev. A to Rev. B
Changes to General Description.....................................................1
Changes to Functional Block Diagram ..........................................1
Changes to Specifications ................................................................3
Changes to Absolute Maximum Ratings........................................5
Changes to Pin Function Descriptions ..........................................6
Changes to Figure 3 ..........................................................................8
Deleted Two TPCs ..........................................................................11
Changes to Figure 18 and Figure 19 .............................................11
Changes to BPDK Mode Section ..................................................21
Changes to Differential Refclk Enable Section ...........................24
Changes to Master Reset Section ..................................................24
Changes to Parallel I/O Operation Section .................................24
Changes to General Operation of the Serial
Interface Section..............................................................................27
Changes to Figure 50 ......................................................................27
Changes to Figure 65 ......................................................................36