Datasheet

AD9852
Rev. E | Page 17 of 52
TUNING
WORD
LOOP
FILTER
PHASE
COMPARATOR
REFERENCE
CLOCK
RF FREQUENCY
OUT
FILTER
AD9852
DDS
DIVIDE-BY-N
VCO
00634-029
Figure 29. Agile High Frequency Synthesizer
REFERENCE
CLOCK
50Ω
1:1 TRANSFORMER
THAT IS, Mini-Circuits
®
T1-1T
FILTER
50Ω
DIFFERENTI
A
L
TRANSFORMER-COUPLED
OUTPUT
AD9852
DDS
I
OUT
I
OUT
00634-030
Figure 30. Differential Output Connection for Reduction of Common-Mode Signals
μPROCESSOR/
CONTROLLER
FPGA, ETC.
R
SET
8-BIT PARALLEL OR
SERIAL PROGRAMMING
DATA AND CONTROL
SIGNALS
AD9852
CMOS LOGIC CLOCK OUT
REFERENCE
CLOCK
300MHz MAX DIRECT
MODE OR 15MHz TO 75MHz
MAX IN THE 4× TO 20× CLOCK
MULTIPLIER MODE
2kΩ
COSINE
DAC
NOTES
1. I
OUT
= APPROXIMATELY 20mA MAX WHEN R
SET
= 2kΩ.
2. SWITCH POSITION 1 PROVIDES COMPLEMENTARY
SINUSOIDAL SIGNALS TO THE COMPARATOR TO
PRODUCE A FIXED 50% DUTY CYCLE FROM THE
COMPARATOR.
3. SWITCH POSITION 2 PROVIDES A USER-PROGRAMMABLE
DC THRESHOLD VOLTAGE TO ALLOW SETTING OF THE
COMPARATOR DUTY CYCLE.
LOW-PASS
FILTER
LOW-PASS
FILTER
CONTROL
DAC
1
2
00634-031
Figure 31. Frequency Agile Clock Generator Applications for the AD9852