Datasheet

AD9852
Rev. E | Page 15 of 52
RISE TIME
1.04ns
500ps/DIV 232mV/DIV 50Ω INPUT
JITTER
[10.6ps RMS]
–33ps 0ps +33ps
00634-022
Figure 22. Typical Comparator Output Jitter, 40 MHz A
OUT
,
300 MHz REFCLK with REFCLK Multiplier Bypassed
REF1 RISE
1.174ns
C1 FALL
1.286ns
CH1 500mVΩ M 500ps CH1
980mV
00634-023
Figure 23. Comparator Rise/Fall Times
FREQUENCY (MHz)
1200
0
AMPLITUDE (mV p-p)
1000
800
600
400
200
0
100 200 300 400 500
MINIMUM COMPARATOR
INPUT DRIVE
V
CM
= 0.5V
00634-024
Figure 24. Comparator Toggle Voltage Requirement