Datasheet
REV. A
AD9848/AD9849
–8–
36
35
34
33
32
31
30
29
28
27
26
25
13 14 15 16 17 18 19 20 21 22 23 24
1
2
3
4
5
6
7
8
9
10
11
12
48 47 46 45 44 39 38 3743 42 41 40
PIN 1
IDENTIFIER
TOP VIEW
(Not to Scale)
SL
REFT
REFB
CMLEVEL
AVSS3
AVDD3
CCDIN
(LSB) D0
D1
D2
D3
D4
NC = NO CONNECT
DVSS3
DVDD3
D5
D6
BYP2
AVDD2
AD9848
D7
AVSS2
NC
NC
DVDD4
DVSS4
HD
VD
PBLK
HBLK
CLPDM
CLPOB
SCK
SDI
H1
H2
DVSS1
DVDD1
H3
H4
DVSS2
RG
DVDD2
AVSS1
CLI
AVDD1
D8
(MSB) D9
BYP1
BYP3
36
35
34
33
32
31
30
29
28
27
26
25
13 14 15 16 17 18 19 20 21 22 23 24
1
2
3
4
5
6
7
8
9
10
11
12
48 47 46 45 44 39 38 3743 42 41 40
PIN 1
IDENTIFIER
TOP VIEW
(Not to Scale)
SL
REFT
REFB
CMLEVEL
AVSS3
AVDD3
CCDIN
D2
D3
D4
DVSS3
DVDD3
D5
D6
BYP2
AVDD2
AD9849
D7
AVSS2
D1
D0 (LSB)
DVDD4
DVSS4
HD
VD
PBLK
HBLK
CLPDM
CLPOB
SCK
SDI
H1
H2
DVSS1
DVDD1
H3
H4
DVSS2
RG
DVDD2
AVSS1
CLI
AVDD1
D8
(MSB) D11
BYP1
BYP3
D9
D10
PIN FUNCTION DESCRIPTIONS
Pin Mnemonic Type* Description
1–5 D0–D4 DO Data Outputs AD9848 Only
1–5 D2–D6 DO Data Outputs AD9849 Only
6 DVSS3 P Digital Ground 3 – Data Outputs
7 DVDD3 P Digital Supply 3 – Data Outputs
8–12 D5–D9 DO Data Outputs (D9 is MSB) AD9848 Only
8–12 D7–D11 DO Data Outputs (D9 is MSB) AD9849 Only
13, 14 H1, H2 DO Horizontal Clocks (to CCD)
15 DVSS1 P Digital Ground 1 – H Drivers
16 DVDD1 P Digital Supply 1 – H Drivers
17, 18 H3, H4 DO Horizontal Clocks (to CCD)
19 DVSS2 P Digital Ground 1 – RG Driver
20 RG DO Reset Gate Clock (to CCD)
21 DVDD2 P Digital Supply 2 – RG Driver
22 AVSS1 P Analog Ground 1
23 CLI DI Master Clock Input
24 AVDD1 P Analog Supply 1
25 AVSS2 P Analog Ground 2
26 AVDD2 P Analog Supply 2
27 BYP1 AO Bypass Pin (0.1 µF to AVSS)
28 BYP2 AO Bypass Pin (0.1 µF to AVSS)
29 CCDIN AI Analog Input for CCD Signal
30 BYP3 AO Bypass Pin (0.1 µF to AVSS)
31 AVDD3 P Analog Supply 3
32 AVSS3 P Analog Ground 3
33 CMLEVEL AO Internal Bias Level Decoupling (0.1 µF to AVSS)
34 REFB AO Reference Bottom Decoupling (1.0 µF to AVSS)
35 REFT AO Reference Top Decoupling (1.0 µF to AVSS)
36 SL DI 3-Wire Serial Load (from µP)
37 SDI DI 3-Wire Serial Data Input (from µP)
38 SCK DI 3-Wire Serial Clock (from µP)
39 CLPOB DI Optical Black Clamp Pulse
40 CLPDM DI Dummy Black Clamp Pulse
41 HBLK DI HCLK Blanking Pulse
42 PBLK DI Preblanking Pulse
43 VD DI Vertical Sync Pulse
44 HD DI Horizontal Sync Pulse
45 DVSS4 P Digital Ground 4 – VD, HD, CLPOB, CLPDM, HBLK, PBLK, SCK, SL, SDATA
46 DVDD4 P Digital Supply 4 – VD, HD, CLPOB, CLPDM, HBLK, PBLK, CK, SL, SDATA
47, 48 NC NC Internally Not Connected AD9848 Only
47, 48 D0, D1 DO Data Output (D0 is LSB) AD9849 Only
*Type: AI = Analog Input, AO = Analog Output, DI = Digital Input, DO = Digital Output, P = Power
PIN CONFIGURATION