Datasheet

AD9838
Rev. A | Page 22 of 32
CHANGE PHASE?
CHANGE FREQUENCY?
NO
NO
NO
NO
YES
NO
YES
YES
NO
YES
YES
YES
YES
YES
DAC OUTPUT
V
OUT
= V
REFOUT
× 18 × R
LOAD
/R
SET
× (1 + (SIN(2π(FREQREG × f
MCLK
× t /2
28
+ PHASEREG/2
12
))))
INITIALIZATION
(SEE FIGURE 25)
SELECT DATA
SOURCES
(SEE FIGURE 27)
WAIT 8/9 MCLK
CYCLES
(SEE TIMING DIAGRAM
FIGURE 3)
CHANGE PSEL/
PSELECT?
CHANGE PHASE
REGISTER?
CHANGE DAC OUTPUT
FROM SIN TO TRIANGLE?
CHANGE OUTPUT AT
SIGN BIT OUT PIN?
CHANGE FSEL/
FSELECT?
CHANGE FREQUENCY
REGISTER?
CONTROL
REGISTER
WRITE
(SEE TABLE 7)
DATA WRITE
(SEE FIGURE 26)
09077-028
Figure 24. Flowchart for AD9838 Initialization and Operation
INITIALIZATION
APPLY RESET
USING PIN
SET RESET PIN = 1
USING PINS
USING CONTROL
BIT
(CONTROL REGISTER WRITE)
RESET = 1
PIN/SW = 0
(CONTROL REGISTER WRITE)
PIN/SW = 1
USING CONTROL
BITS
SET RESET = 0
SELECT FREQUENCY REGISTERS
SELECT PHASE REGISTERS
(CONTROL REGISTER WRITE)
RESET BIT = 0
FSEL = SELECTED FREQUENCY REGISTER
PSEL = SELECTED PHASE REGISTER
PIN/SW = 0
(APPLY SIGNALS AT PINS)
RESET PIN = 0
FSELECT = SELECTED FREQUENCY REGISTER
PSELECT = SELECTED PHASE REGISTER
PIN/SW = 1
WRITE TO FREQUENCY AND PHASE REGISTERS
FREQ0 REG = f
OUT0
/f
MCLK
× 2
28
FREQ1 REG = f
OUT1
/f
MCLK
× 2
28
PHASE0 AND PHASE1 REG = (PHASESHIFT × 2
12
)/2π
(SEE FIGURE 26)
09077-029
Figure 25. Flowchart for Initialization