Datasheet

AD9833 Data Sheet
Rev. G | Page 18 of 21
DATA WRITE
(SEE FIGURE 28)
SELECT DATA
SOURCES
WAIT 7/8 MCLK
CYCLES
V
OUT
= V
REF
× 18 × R
LOAD
/ R
SET
× (1 + (SIN (2π (FREQREG × f
MCLK
× t
/2
28 + PHASEREG / 2
12
))))
DAC OUTPUT
CHANGE PHASE?
CHANGE FREQUENCY?
CHANGE DAC OUTPUT
FROM SIN TO RAMP?
CHANGE OUTPUT TO
A DIGITAL SIGNAL?
CHANGE
PSELECT?
CHANGE PHASE
REGISTER?
CHANGE
FSELECT?
CHANGE FREQUENCY
REGISTER?
CONTROL REGISTER
WRITE
(SEE TABLE 6)
INITIALIZATION
(SEE FIGURE 27 BELOW)
NO
NO
NO
NO
YES
NO
YES
YES
NO
YES
YES
YES
YES
YES
02704-026
Figure 26. Flowchart for AD9833 Initialization and Operation
INITIALIZATION
APPLY RESET
(CONTROL REGISTER WRITE)
RESET = 1
WRITE TO FREQUENCY AND PHASE REGISTERS
FREQ0 REG =
f
OUT0
/f
MCLK
× 2
28
FREQ1 REG = f
OUT1
/f
MCLK
× 2
28
PHASE0 AND PHASE1 REG = (PHASESHIFT × 2
12
)/2π
(SEE FIGURE 28)
SET RESET = 0
SELECT FREQUENCY REGISTERS
SELECT PHASE REGISTERS
(CONTROL REGISTER WRITE)
RESET BIT = 0
FSELECT = SELECTED FREQUENCY REGISTER
PSELECT = SELECTED PHASE REGISTER
02704-027
Figure 27. Flowchart for Initialization