Datasheet

REV. 0
AD9824
–5–
ABSOLUTE MAXIMUM RATINGS
With
Respect
Parameter To Min Max Unit
AVDD1, AVDD2 AVSS –0.3 +3.9 V
DVDD1, DVDD2 DVSS –0.3 +3.9 V
DRVDD DRVSS –0.3 +3.9 V
Digital Outputs DRVSS –0.3 DRVDD + 0.3 V
SHP, SHD, DATACLK DVSS –0.3 DVDD + 0.3 V
CLPOB, CLPDM, PBLK DVSS –0.3 DVDD + 0.3 V
SCK, SL, SDATA DVSS –0.3 DVDD + 0.3 V
VRT, VRB, CMLEVEL AVSS –0.3 AVDD + 0.3 V
BYP1-3, CCDIN AVSS –0.3 AVDD + 0.3 V
Junction Temperature 150 °C
Lead Temperature (10 sec) 300 °C
TIMING SPECIFICATIONS
Parameter Symbol Min Typ Max Unit
SAMPLE CLOCKS
DATACLK, SHP, SHD Clock Period t
CP
33 33 ns
DATACLK High/Low Pulsewidth t
ADC
13 16.7 ns
SHP Pulsewidth t
SHP
5 8.3 ns
SHD Pulsewidth t
SHD
5 8.3 ns
CLPDM Pulsewidth t
CDM
410 Pixels
CLPOB Pulsewidth
* t
COB
220 Pixels
SHP Rising Edge to SHD Falling Edge t
S1
0 8.3 ns
SHP Rising Edge to SHD Rising Edge t
S2
15 16.7 ns
Internal Clock Delay t
ID
3.0 ns
Inhibited Clock Period t
INH
10 ns
DATA OUTPUTS
Output Delay t
OD
13 16 ns
Output Hold Time t
H
7.0 7.6 ns
Pipeline Delay 9 Cycles
SERIAL INTERFACE
Maximum SCK Frequency f
SCLK
10 MHz
SL to SCK Setup Time t
LS
10 ns
SCK to SL Hold Time t
LH
10 ns
SDATA Valid to SCK Rising Edge Setup t
DS
10 ns
SCK Falling Edge to SDATA Valid Hold t
DH
10 ns
SCK Falling Edge to SDATA Valid Read t
DV
10 ns
* Minimum CLPOB pulsewidth is for functional operation only. Wider typical pulses are recommended to achieve low noise clamp performance.
Specifications subject to change without notice.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD9824 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
(C
L
= 20 pF, f
SAMP
= 30 MHz, CCD-Mode Timing in Figures 5 and 6, AUX-Mode Timing in Figure 7,
Serial Timing in Figures 21–24.)
ORDERING GUIDE
Temperature Package Package
Model Range Description Option
AD9824KCP –20°C to +85°C LFCSP CP-48
THERMAL CHARACTERISTICS
Thermal Resistance
48-Lead LFCSP Package
θ
JA
= 26°C/W*
*
θ
JA
is measured using a 4-layer PCB with the exposed paddle
soldered to the board.