Datasheet

REV. 0
AD9806
–8–
PGA GAIN REGISTER CODE
34
0
PGA GAIN – dB
127 255
383 511 639 767 895 1023
28
22
16
10
4
–2
Figure 5a. PGA Gain Curve for CCD-Mode
AUXMID
0.1␮F
PGA GAIN
REGISTER
9
5k⍀
0.4V
0.4V
INPUT SIGNAL
??V
0.8V
0.4V
–4 dB TO +14dB
PIN 35
PGA
ADC
MIDSCALE
Figure 6. AUXMID-Mode Circuit Block Diagram
H
SYNC
INTERNAL CLAMPING
OCCURS DURING SYNC
VIDEO
SIGNAL
INPUT
CLAMP INTERVAL
(AD9806 INTERNAL
SIGNAL)
NOTE: The AD9806 uses an “automatic” video clamp that senses the most negative in the input signal and uses this level to set the clamp voltage.
As shown in the video waveform above, the SYNC level will be clamped to the black level specified in the E-Register.
Figure 4. AUX-MODE and ADC-MODE Clamp Operation
PGA GAIN REGISTER CODE
14
PGA GAIN – dB
639 767 895 1023
11
8
5
2
–1
512
–4
Figure 5b. PGA Gain Curve for AUXMID-Mode
PGA GAIN CURVE DETAILS
In CCD-Mode, the AD9806 PGA stage provides a gain range
of 0 dB to 34 dB, programmable with 10-bit resolution through
the serial digital interface. The PGA gain curve is divided into
two separate regions. When the PGA Gain Register code is
between 0, and 511, the curve follows a (1 + x)/(1 – x) shape,
which is similar to a “linear-in-dB” characteristic. From Code
512 to Code 1023, the curve follows a “linear-in-dB” shape. In
AUXMID-Mode, the PGA provides a gain range of –4 dB to
+14 dB, programmable with 9-bit resolution. The exact PGA
gain for either mode can be calculated for any Gain Register
value by using the following equations:
TIMING SPECIFICATIONS (Continued)
CCD-MODE
Code Range Gain Equation (dB)
0–511 Gain = 20 log
10
([658 + code]/[658 – code]) – 2.4
512–1023 Gain = (0.0354)(code) – 2.4
AUXMID-MODE
Code Range Gain Equation (dB)
512–1023 Gain = 20 log
10
([146 + code]/[1170 – code]) – 4