Datasheet

AD9785/AD9787/AD9788
Rev. A | Page 34 of 64
D
A
TACLK
INPUT
DATA
t
SDATACLK
t
HDATACLK
07098-112
Figure 47. DATACLK Timing
DATACLK
P1D[15:0]
TXENABLE
SMP_CLK
P1D_SMP[15:0]
IQSEL_SMP
I DAC[15:0]
Q DAC[15:0]
I DAC[15:0]
Q DAC[15:0]
QFIRST = 1
QFIRST = 0
P1D(1) P1D(2) P1D(3) P1D(4) P1D(5) P1D(6) P1D(7) P1D(8)
P1D(1) P1D(2) P1D(3) P1D(4) P1D(5)
P1D(1) P1D(3) P1D(5)
P1D(1) P1D(3) P1D(5)
P1D(2) P1D(4) P1D(6)
P1D(4) P1D(6)
P1D(6) P1D(7) P1D(8)
07098-110
Figure 48. Single-Port (Interleaved) Mode Digital Interface Timing
Table 25. Data Timing Specifications vs. Temperature
Timing Parameter Temperature Min t
S
(ns) Min t
H
(ns) Min DVW (ns)
Data with respect to REFCLK −40°C −0.25 1.7 1.45
+25°C −0.45 2.1 1.65
+85°C −0.6 2.4 1.8
−40°C to +85°C −0.25 2.4 2.15
Data with respect to DATACLK −40°C 3.7 −1.5 2.2
+25°C 4.2 −1.8 2.4
+85°C 4.6 −2.0 2.6
−40°C to +85°C 4.6 −1.5 3.1
SYNC_I with respect to REFCLK −40°C 0.45 −0.1 0.35
+25°C 0.3 0.1 0.4
+85°C 0.2 0.25 0.45
−40°C to +85°C 0.45 0.25 0.7