Datasheet

AD9785/AD9787/AD9788
Rev. A | Page 10 of 64
Pin No. Mnemonic Description
31 P1D[1] Port 1, Data Input D1.
34 P1D[0] Port 1, Data Input D0 (LSB).
35, 36, 58, 59 NC No Connection Necessary.
37 DATACLK Data Clock Output.
38, 61 DVDD33 3.3 V Digital Supply.
39 TXENABLE Transmit Enable.
40 P2D[13] Port 2, Data Input D13 (MSB).
41 P2D[12] Port 2, Data Input D12.
42 P2D[11] Port 2, Data Input D11.
45 P2D[10] Port 2, Data Input D10.
46 P2D[9] Port 2, Data Input D9.
47 P2D[8] Port 2, Data Input D8.
48 P2D[7] Port 2, Data Input D7.
49 P2D[6] Port 2, Data Input D6.
50 P2D[5] Port 2, Data Input D5.
51 P2D[4] Port 2, Data Input D4.
52 P2D[3] Port 2, Data Input D3.
55 P2D[2] Port 2, Data Input D2.
56 P2D[1] Port 2, Data Input D1.
57 P2D[0] Port 2, Data Input D0 (LSB).
62 SYNC_O− Differential Synchronization Output, Negative.
63 SYNC_O+ Differential Synchronization Output, Positive.
65 PLL_LOCK PLL Lock Indicator.
66 SPI_SDO SPI Port Data Output.
67 SPI_SDIO SPI Port Data Input/Output.
68 SCLK SPI Port Clock.
69 SPI_CSB SPI Port Chip Select Bar.
70 RESET Reset, Active High.
71 IRQ Interrupt Request.
73 IPTAT
Factory Test Pin. Output current is proportional to absolute temperature, approximately 10 A
at 25°C with approximately 20 nA/°C slope. This pin should remain floating.
74 VREF Voltage Reference Output.
75 I120 120 A Reference Current.
76, 78, 80, 96, 98, 100 AVDD33 3.3 V Analog Supply.
83 OUT2_P Differential DAC Current Output, Positive, Channel 2.
84 OUT2_N Differential DAC Current Output, Negative, Channel 2.
86 AUX2_P Auxiliary DAC Current Output, Positive, Channel 2.
87 AUX2_N Auxiliary DAC Current Output, Negative, Channel 2.
89 AUX1_N Auxiliary DAC Current Output, Negative, Channel 1.
90 AUX1_P Auxiliary DAC Current Output, Positive, Channel 1.
92 OUT1_N Differential DAC Current Output, Negative, Channel 1.
93 OUT1_P Differential DAC Current Output, Positive, Channel 1.
Exposed Paddle EPAD Conductive Heat Sink. Connect to analog common (AGND).