Datasheet

–4–
REV. D
AD977/AD977A–SPECIFICATIONS (Both Specs)
A, B, C Grades
Parameter Conditions Min Typ Max Unit
DIGITAL INPUTS
Logic Levels
V
IL
–0.3 +0.8 V
V
IH
2.0 V
DIG
+ 0.3 V
I
IL
± 10 µA
I
IH
± 10 µA
DIGITAL OUTPUTS
Data Format Serial 16-Bits
Data Coding Binary Two’s Complement or Straight Binary
Pipeline Delay Conversion Results Only Available after Completed Conversion
V
OL
I
SINK
= 1.6 mA 0.4 V
V
OH
I
SOURCE
= 500 µA4 V
POWER SUPPLIES
Specified Performance
V
DIG
4.75 5 5.25 V
V
ANA
4.75 5 5.25 V
I
DIG
4mA
I
ANA
11 mA
Power Dissipation
PWRD LOW 100 mW
PWRD HIGH 50 µW
TEMPERATURE RANGE
Specified Performance T
MIN
to T
MAX
–40 +85 °C
Specifications subject to change without notice.
TIMING SPECIFICATIONS
AD977A AD977
Symbol Min Typ Max Min Typ Max Unit
Convert Pulsewidth t
1
50 50 ns
R/C, CS to BUSY Delay t
2
83 83 ns
BUSY LOW Time t
3
4.0 8.0 µs
BUSY Delay after End of Conversion t
4
50 50 ns
Aperture Delay t
5
40 40 ns
Conversion Time t
6
3.8 4.0 7.6 8.0 µs
Acquisition Time t
7
1.0 2.0 µs
Throughput Time t
6
+ t
7
510µs
R/C Low to DATACLK Delay t
8
220 350 ns
DATACLK Period t
9
220 450 ns
DATA Valid Setup Time t
10
50 100 ns
DATA Valid Hold Time t
11
20 20 ns
EXT. DATACLK Period t
12
66 100 ns
EXT. DATACLK HIGH t
13
20 20 ns
EXT. DATACLK LOW t
14
30 30 ns
R/C, CS to EXT. DATACLK Setup Time t
15
20 t
12
+ 5 20 t
12
+ 5 ns
R/C to CS Setup Time t
16
10 10 ns
EXT. DATACLK to SYNC Delay t
17
15 66 15 66 ns
EXT. DATACLK to DATA Valid Delay t
18
25 66 25 66 ns
CS to EXT. DATACLK Rising Edge Delay t
19
10 10 ns
Previous DATA Valid after CS, R/C Low t
20
3.5 7.5 µs
BUSY to EXT. DATACLK Setup Time t
21
55ns
Final EXT. DATACLK to BUSY Rising Edge t
22
1.7 3.5 µs
TAG Valid Setup Time t
23
00ns
TAG Valid Hold Time t
24
20 20 ns
Specifications subject to change without notice.
(AD977A: F
S
= 200 kHz, AD977: F
S
= 100 kHz, V
DIG
= V
ANA
= 5 V, –40C to +85C)