Datasheet

AD9776/AD9778/AD9779
Rev. A | Page 51 of 56
G2ENBL
VPS1 G1A G1B LOIP
VPS2
G4A G4B
QBBP VOUT
G3
IBBP IBBN QBBN LOIN
AD8349
98
7 3 4 6
12 13 14 16 11 10
1 215 5
U9
VDDM
DGND2
VDDM
R14
1kΩ
JP1
J4
C47
100pF
C72
0.1µF
C73
0.1µF
C41
10µF
10V
2
2
1
DGND2
2
DGND2
2
DGND2
2
DGND2
2
DGND2
DGND2
MODULATED OUTPUT
2
J5
JP9
2
1
DGND2
LOCAL OSC OUTPUT
C74
100pF
C54
0.1µF
C79
17.2pF
C65
17.2pF
C75
100pF
C51
0.1µF
+
JP13
R60
40Ω
R2
150Ω
R3
150Ω
R25
150Ω
R61
40Ω
1
3
P
5
2
S
ETC1-1-13
T4
4
6 4
P
1
S
ADTL1-12
T3
3
JP10
R24
20Ω
R62
147.5Ω
C82
2.1pF
L11
55nH
C43
17.2pF
C44
17.2pF
C83
2.1pF
L10
55nH
R27
300Ω
D2N
D2P
AUX2_P
AUX2_N
R23
20Ω
C53
0.1µF
C52
17.2pF
C50
17.2pF
JP13
R20
40Ω
R4
150Ω
R12
150Ω
R17
150Ω
R21
40Ω
6 4
P
1
S
ADTL1-12
T5
3
R15
20Ω
R22
147.5Ω
C81
2.1pF
L11
55nH
C63
17.2pF
C64
17.2pF
C80
2.1pF
L10
55nH
R19
300Ω
D1N
D1P
AUX1_P
AUX1_N
R16
20Ω
05361-103
Figure 106. Evaluation Board, Rev. D, AD8349 Quadrature Modulator
4
5
S
3
2
R13
VAL
R30
1k
Ω
R31
300
Ω
R28
25
Ω
R29
25
Ω
P
ETC1-1-13
T2
J1
CLKIN
C19
0.1
μ F
C16
DNB
CVDD18
CLK_P
CLK_N
C17
0.1
μ F
C23
0.1
μ F
1
05361-104
Figure 107. Evaluation Board, Rev. D, DAC Clock Interface