Datasheet

AD9776/AD9778/AD9779
Rev. A | Page 42 of 56
05361-120
REFERENCE
CLOCK IN
DATA
CLOCK OUT
INPUT
DATA
t
SREFCLK
t
HREFCLK
t
SDATACLK
t
HDATACLK
Figure 92. Timing Specifications, PLL Enabled or Disabled, Interpolation = 1×
REFERENCE
CLOCK IN
DATA
CLOCK OUT
SYNC_IN
t
S_SYNC
t
H_SYNC
05361-121
INPUT
DATA
t
SREFCLK
t
HREFCLK
t
SDATACLK
t
HDATACLK
Figure 93. Timing Specifications, PLL Enabled or Disabled, Interpolation = 2×
0
5361-122
REFERENCE
CLOCK IN
DATA
CLOCK OUT
INPUT
DATA
t
SREFCLK
t
HREFCLK
t
SDATACLK
t
HDATACLK
t
S_SYNC
t
H_SYNC
SYNC_IN
Figure 94. Timing Specifications, PLL Enabled or Disabled, Interpolation = 4×
REFERENCE
CLOCK IN
DATA
CLOCK OUT
05361-123
INPUT
DATA
t
SREFCLK
t
HREFCLK
t
SDATACLK
t
HDATACLK
SYNC_IN
t
S_SYNC
t
H_SYNC
Figure 95. Timing Specifications, PLL Enabled or Disabled, Interpolation = 8×