Datasheet

AD9776/AD9778/AD9779
Rev. A | Page 10 of 56
Pin
No. Mnemonic
Description
39 TXENABLE Transmit Enable.
40 P2D<11> Port 2, Data Input D11 (MSB).
41 P2D<10> Port 2, Data Input D10.
42 P2D<9> Port 2, Data Input D9.
43 DVDD18 1.8 V Digital Supply.
44 DGND Digital Common.
45 P2D<8> Port 2, Data Input D8.
46 P2D<7> Port 2, Data Input D7.
47 P2D<6> Port 2, Data Input D6.
48 P2D<5> Port 2, Data Input D5.
49 P2D<4> Port 2, Data Input D4.
50 P2D<3> Port 2, Data Input D3.
51 P2D<2> Port 2, Data Input D2.
52 P2D<1> Port 2, Data Input D1.
53 DVDD18 1.8 V Digital Supply.
54 DGND Digital Common.
55 P2D<0> Port 2, Data Input D0 (LSB).
56 NC No Connect.
57 NC No Connect.
58 NC No Connect.
59 NC No Connect.
60 DVDD18 1.8 V Digital Supply.
61 DVDD33 3.3 V Digital Supply.
62 SYNC_O− Differential Synchronization Output.
63 SYNC_O+ Differential Synchronization Output
64 DGND Digital Common
65 PLL_LOCK PLL Lock Indicator
66 SDO SPI Port Data Output
67 SDIO SPI Port Data Input/Output
68 SCLK SPI Port Clock
69 CSB SPI Port Chip Select Bar.
70 RESET Reset, Active High.
71 IRQ Interrupt Request.
72 AGND Analog Common.
Pin
No. Mnemonic
Description
73 IPTAT
Factory Test Pin. Output current is
proportional to absolute temperature,
approximately 10 μA at 25°C with
approximately 20 nA/°C slope. This pin
should remain floating.
74 VREF Voltage Reference Output.
75 I120 120 μA Reference Current.
76 AVDD33 3.3 V Analog Supply.
77 AGND Analog Common.
78 AVDD33 3.3 V Analog Supply.
79 AGND Analog Common.
80 AVDD33 3.3 V Analog Supply.
81 AGND Analog Common.
82 AGND Analog Common.
83 OUT2_P Differential DAC Current Output, Channel 2.
84 OUT2_N Differential DAC Current Output, Channel 2.
85 AGND Analog Common.
86 AUX2_P Auxiliary DAC Current Output, Channel 2.
87 AUX2_N Auxiliary DAC Current Output, Channel 2.
88 AGND Analog Common.
89 AUX1_N Auxiliary DAC Current Output, Channel 1.
90 AUX1_P Auxiliary DAC Current Output, Channel 1.
91 AGND Analog Common.
92 OUT1_N Differential DAC Current Output, Channel 1.
93 OUT1_P Differential DAC Current Output, Channel 1.
94 AGND Analog Common.
95 AGND Analog Common.
96 AVDD33 3.3 V Analog Supply.
97 AGND Analog Common.
98 AVDD33 3.3 V Analog Supply.
99 AGND Analog Common.
100 AVDD33 3.3 V Analog Supply.
1
The combined differential clock input at the CLK+ and CLK– pins are referred
to as REFCLK.